From patchwork Fri Mar 25 15:28:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 791 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:45:52 -0000 Delivered-To: patches@linaro.org Received: by 10.42.161.68 with SMTP id s4cs187752icx; Fri, 25 Mar 2011 08:29:28 -0700 (PDT) Received: by 10.236.170.101 with SMTP id o65mr1416990yhl.64.1301066968409; Fri, 25 Mar 2011 08:29:28 -0700 (PDT) Received: from mail-yi0-f50.google.com (mail-yi0-f50.google.com [209.85.218.50]) by mx.google.com with ESMTPS id u40si72602yhn.255.2011.03.25.08.29.27 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 25 Mar 2011 08:29:27 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.218.50 is neither permitted nor denied by best guess record for domain of mathieu.poirier@linaro.org) client-ip=209.85.218.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.218.50 is neither permitted nor denied by best guess record for domain of mathieu.poirier@linaro.org) smtp.mail=mathieu.poirier@linaro.org Received: by yie30 with SMTP id 30so560390yie.37 for ; Fri, 25 Mar 2011 08:29:27 -0700 (PDT) Received: by 10.43.54.146 with SMTP id vu18mr1409338icb.529.1301066966813; Fri, 25 Mar 2011 08:29:26 -0700 (PDT) Received: from localhost.localdomain (S0106002369de4dac.cg.shawcable.net [70.73.24.112]) by mx.google.com with ESMTPS id mv26sm723568ibb.62.2011.03.25.08.29.24 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 25 Mar 2011 08:29:25 -0700 (PDT) From: mathieu.poirier@linaro.org To: linux-arm-kernel@lists.infradead.org Cc: mathieu.poirier@canonical.com, patches@linaro.org, linus.walleij@stericsson.com Subject: [PATCH 6/8] ux500: fixing irq header file dependency. Date: Fri, 25 Mar 2011 09:28:59 -0600 Message-Id: <1301066941-15877-7-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1301066941-15877-1-git-send-email-mathieu.poirier@linaro.org> References: <1301066941-15877-1-git-send-email-mathieu.poirier@linaro.org> From: Mathieu J. Poirier Signed-off-by: Mathieu Poirier --- .../mach-ux500/include/mach/irqs-board-mop500.h | 44 ++++++++++++++++++++ arch/arm/mach-ux500/include/mach/irqs.h | 43 ------------------- 2 files changed, 44 insertions(+), 43 deletions(-) diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h index 7cdeb2a..2c82c9c 100644 --- a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h +++ b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h @@ -10,6 +10,33 @@ /* Number of AB8500 irqs is taken from header file */ #include +#include +#include + +#define IRQ_LOCALTIMER 29 +#define IRQ_LOCALWDOG 30 + +/* Shared Peripheral Interrupt (SHPI) */ +#define IRQ_SHPI_START 32 + +/* Interrupt numbers generic for shared peripheral */ +#define IRQ_MTU0 (IRQ_SHPI_START + 4) + +/* There are 128 shared peripheral interrupts assigned to + * INTID[160:32]. The first 32 interrupts are reserved. + */ +#define DBX500_NR_INTERNAL_IRQS 161 + +/* After chip-specific IRQ numbers we have the GPIO ones */ +#define NOMADIK_NR_GPIO 288 +#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + DBX500_NR_INTERNAL_IRQS) +#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - DBX500_NR_INTERNAL_IRQS) +#define IRQ_BOARD_START NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) + +/* This will be overridden by board-specific irq headers */ +#define IRQ_BOARD_END IRQ_BOARD_START + +/*********************************************************************/ #define MOP500_AB8500_IRQ_BASE IRQ_BOARD_START #define MOP500_AB8500_IRQ_END (MOP500_AB8500_IRQ_BASE \ @@ -44,4 +71,21 @@ #define IRQ_BOARD_END MOP500_IRQ_END #endif +/*********************************************************************/ + +/* + * After the board specific IRQ:s we reserve a range of IRQ:s in which virtual + * IRQ:s representing modem IRQ:s can be allocated + */ +#define IRQ_MODEM_EVENTS_BASE (IRQ_BOARD_END + 1) +#define IRQ_MODEM_EVENTS_NBR 72 +#define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR) + +/* List of virtual IRQ:s that are allocated from the range above */ +#define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43) +#define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45) +#define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41) + +#define NR_IRQS IRQ_MODEM_EVENTS_END + #endif diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h index ba1294c..ccc2ba0 100644 --- a/arch/arm/mach-ux500/include/mach/irqs.h +++ b/arch/arm/mach-ux500/include/mach/irqs.h @@ -10,49 +10,6 @@ #ifndef ASM_ARCH_IRQS_H #define ASM_ARCH_IRQS_H -#include -#include - -#define IRQ_LOCALTIMER 29 -#define IRQ_LOCALWDOG 30 - -/* Shared Peripheral Interrupt (SHPI) */ -#define IRQ_SHPI_START 32 - -/* Interrupt numbers generic for shared peripheral */ -#define IRQ_MTU0 (IRQ_SHPI_START + 4) - -/* There are 128 shared peripheral interrupts assigned to - * INTID[160:32]. The first 32 interrupts are reserved. - */ -#define DBX500_NR_INTERNAL_IRQS 161 - -/* After chip-specific IRQ numbers we have the GPIO ones */ -#define NOMADIK_NR_GPIO 288 -#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + DBX500_NR_INTERNAL_IRQS) -#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - DBX500_NR_INTERNAL_IRQS) -#define IRQ_BOARD_START NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) - -/* This will be overridden by board-specific irq headers */ -#define IRQ_BOARD_END IRQ_BOARD_START - -#ifdef CONFIG_MACH_U8500 #include -#endif - -/* - * After the board specific IRQ:s we reserve a range of IRQ:s in which virtual - * IRQ:s representing modem IRQ:s can be allocated - */ -#define IRQ_MODEM_EVENTS_BASE (IRQ_BOARD_END + 1) -#define IRQ_MODEM_EVENTS_NBR 72 -#define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR) - -/* List of virtual IRQ:s that are allocated from the range above */ -#define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43) -#define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45) -#define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41) - -#define NR_IRQS IRQ_MODEM_EVENTS_END #endif /* ASM_ARCH_IRQS_H */