From patchwork Mon Mar 21 03:32:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 687 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:44:42 -0000 Delivered-To: patches@linaro.org Received: by 10.220.28.198 with SMTP id n6cs112938vcc; Sun, 20 Mar 2011 20:33:11 -0700 (PDT) Received: by 10.150.162.2 with SMTP id k2mr3495907ybe.10.1300678391022; Sun, 20 Mar 2011 20:33:11 -0700 (PDT) Received: from TX2EHSOBE002.bigfish.com (tx2ehsobe001.messaging.microsoft.com [65.55.88.11]) by mx.google.com with ESMTPS id k5si4720206ybe.99.2011.03.20.20.33.09 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 20 Mar 2011 20:33:09 -0700 (PDT) Received-SPF: neutral (google.com: 65.55.88.11 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) client-ip=65.55.88.11; Authentication-Results: mx.google.com; spf=neutral (google.com: 65.55.88.11 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) smtp.mail=R65037@freescale.com Received: from mail70-tx2-R.bigfish.com (10.9.14.243) by TX2EHSOBE002.bigfish.com (10.9.40.22) with Microsoft SMTP Server id 14.1.225.8; Mon, 21 Mar 2011 03:33:07 +0000 Received: from mail70-tx2 (localhost.localdomain [127.0.0.1]) by mail70-tx2-R.bigfish.com (Postfix) with ESMTP id D18751E01D0; Mon, 21 Mar 2011 03:33:07 +0000 (UTC) X-SpamScore: -2 X-BigFish: VS-2(zzbb2cKzz1202hzz8275bh1497iz2dh2a8h668h63h) X-Spam-TCS-SCL: 2:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail70-tx2 (localhost.localdomain [127.0.0.1]) by mail70-tx2 (MessageSwitch) id 1300678387599006_25591; Mon, 21 Mar 2011 03:33:07 +0000 (UTC) Received: from TX2EHSMHS046.bigfish.com (unknown [10.9.14.246]) by mail70-tx2.bigfish.com (Postfix) with ESMTP id 8D8EEFD804E; Mon, 21 Mar 2011 03:33:07 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS046.bigfish.com (10.9.99.146) with Microsoft SMTP Server (TLS) id 14.1.225.8; Mon, 21 Mar 2011 03:33:07 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.270.2; Sun, 20 Mar 2011 22:33:03 -0500 Received: from x-VirtualBox.ap.freescale.net (x-VirtualBox.ap.freescale.net [10.192.242.62]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p2L3WjN4020528; Sun, 20 Mar 2011 22:33:00 -0500 (CDT) From: Richard Zhu To: CC: , , , , , , , , Richard Zhu , Richard Zhao Subject: [PATCH V7 4/4] mmc: sdhci-esdhc: enable esdhc on imx53 Date: Mon, 21 Mar 2011 11:32:41 +0800 Message-ID: <1300678361-6259-5-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1300678361-6259-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1300678361-6259-1-git-send-email-Hong-Xing.Zhu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Fix the NO INT in the Multi-BLK IO in SD/MMC, and Multi-BLK read in SDIO on imx53. The CMDTYPE of the CMD register (offset 0xE) should be set to "11" when the STOP CMD12 is issued on imx53 to abort one open ended multi-blk IO. Otherwise one the TC INT wouldn't be generated. In exact block transfer, the controller doesn't complete the operations automatically as required at the end of the transfer and remains on hold if the abort command is not sent on imx53. As a result, the TC flag is not asserted and SW received timeout exeception. set bit1 of Vendor Spec registor to fix it. Signed-off-by: Richard Zhu Signed-off-by: Richard Zhao --- drivers/mmc/host/sdhci-esdhc-imx.c | 42 ++++++++++++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index f315cd0..534ad14 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -19,13 +19,31 @@ #include #include #include +#include +#include #include #include #include "sdhci.h" #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" +/* VENDOR SPEC register */ +#define SDHCI_VENDOR_SPEC 0xC0 +#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 + #define ESDHC_FLAG_GPIO_FOR_CD_WP (1 << 0) +/* + * The CMDTYPE of the CMD register (offset 0xE) should be set to + * "11" when the STOP CMD12 is issued on imx53 to abort one + * open ended multi-blk IO. Otherwise the TC INT wouldn't + * be generated. + * In exact block transfer, the controller doesn't complete the + * operations automatically as required at the end of the + * transfer and remains on hold if the abort command is not sent. + * As a result, the TC flag is not asserted and SW received timeout + * exeception. Bit1 of Vendor Spec registor is used to fix it. + */ +#define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1) struct pltfm_imx_data { int flags; @@ -80,6 +98,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) */ val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); + if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT) + && (reg == SDHCI_INT_STATUS) + && (val & SDHCI_INT_DATA_END))) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } + writel(val, host->ioaddr + reg); } @@ -103,9 +130,21 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) * Postpone this write, we must do it together with a * command write that is down below. */ + if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT) + && (host->cmd->opcode == SD_IO_RW_EXTENDED) + && (host->cmd->data->blocks > 1) + && (host->cmd->data->flags & MMC_DATA_READ)) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } imx_data->scratchpad = val; return; case SDHCI_COMMAND: + if ((host->cmd->opcode == MMC_STOP_TRANSMISSION) + && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)) + val |= SDHCI_CMD_ABORTCMD; writel(val << 16 | imx_data->scratchpad, host->ioaddr + SDHCI_TRANSFER_MODE); return; @@ -213,6 +252,9 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro; } + if (!(cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx51())) + imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT; + if (boarddata) { err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP"); if (err) {