From patchwork Mon Mar 14 09:55:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 551 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:43:36 -0000 Delivered-To: patches@linaro.org Received: by 10.224.45.75 with SMTP id d11cs56724qaf; Mon, 14 Mar 2011 06:54:54 -0700 (PDT) Received: by 10.224.60.83 with SMTP id o19mr7352307qah.199.1300110894477; Mon, 14 Mar 2011 06:54:54 -0700 (PDT) Received: from VA3EHSOBE003.bigfish.com (va3ehsobe003.messaging.microsoft.com [216.32.180.13]) by mx.google.com with ESMTPS id br20si6448279vdb.166.2011.03.14.06.54.53 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Mar 2011 06:54:54 -0700 (PDT) Received-SPF: neutral (google.com: 216.32.180.13 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) client-ip=216.32.180.13; Authentication-Results: mx.google.com; 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Mon, 14 Mar 2011 13:53:44 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.270.2; Mon, 14 Mar 2011 04:55:54 -0500 Received: from x-VirtualBox.ap.freescale.net (x-VirtualBox.ap.freescale.net [10.192.242.62]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p2E9tkJi028849; Mon, 14 Mar 2011 04:55:51 -0500 (CDT) From: Richard Zhu To: CC: , , , , , , Richard Zhu Subject: [RFC PATCH 2/2] MX53 Enable the AHCI SATA on MX53 LOCO Date: Mon, 14 Mar 2011 17:55:44 +0800 Message-ID: <1300096544-1946-2-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1300096544-1946-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1300096544-1946-1-git-send-email-Hong-Xing.Zhu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Signed-off-by: Richard Zhu --- arch/arm/mach-mx5/board-mx53_loco.c | 120 +++++++++++++++++++++++++++++++++++ 1 files changed, 120 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 0a18f8d..9a7bbea 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -23,11 +23,13 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -203,6 +205,123 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { .bitrate = 100000, }; +/* HW Initialization, if return 0, initialization is successful. */ +static int sata_init(struct device *dev, void __iomem *addr) +{ + void __iomem *mmio; + struct clk *clk; + int ret = 0; + u32 tmpdata; + + clk = clk_get(dev, "imx_sata_clk"); + ret = IS_ERR(clk); + if (ret) { + printk(KERN_ERR "IMX AHCI can't get clock.\n"); + return ret; + } + ret = clk_enable(clk); + if (ret) { + printk(KERN_ERR "IMX AHCI can't enable clock.\n"); + clk_put(clk); + return ret; + } + + /* FSL IMX AHCI SATA uses the internal usb phy1 clk on loco */ + clk = clk_get(dev, "usb_phy1"); + ret = IS_ERR(clk); + if (ret) { + printk(KERN_ERR "IMX AHCI can't get USB PHY1 CLK.\n"); + goto no_input_clk; + } + ret = clk_enable(clk); + if (ret) { + printk(KERN_ERR "IMX AHCI Can't enable USB PHY1 clock.\n"); + clk_put(clk); + goto no_input_clk; + } + + /* Get the AHB clock rate, and configure the TIMER1MS reg later */ + clk = clk_get(NULL, "ahb_clk"); + ret = IS_ERR(clk); + if (ret) { + printk(KERN_ERR "IMX AHCI can't get AHB clock.\n"); + goto no_clk; + } + + mmio = ioremap(MX53_SATA_BASE_ADDR, SZ_2K); + if (mmio == NULL) { + printk(KERN_ERR "Failed to map SATA REGS\n"); + goto no_clk; + } + + tmpdata = readl(mmio + HOST_CAP); + if (!(tmpdata & HOST_CAP_SSS)) { + tmpdata |= HOST_CAP_SSS; + writel(tmpdata, mmio + HOST_CAP); + } + + if (!(readl(mmio + HOST_PORTS_IMPL) & 0x1)) + writel((readl(mmio + HOST_PORTS_IMPL) | 0x1), + mmio + HOST_PORTS_IMPL); + + tmpdata = clk_get_rate(clk) / 1000; + writel(tmpdata, mmio + HOST_TIMER1MS); + + iounmap(mmio); + + return ret; + +no_clk: + clk = clk_get(dev, "usb_phy1"); + if (IS_ERR(clk)) { + clk = NULL; + printk(KERN_ERR "IMX AHCI can't get USB PHY1 CLK.\n"); + } else { + clk_disable(clk); + clk_put(clk); + } + +no_input_clk: + clk = clk_get(dev, "imx_sata_clk"); + if (IS_ERR(clk)) { + clk = NULL; + printk(KERN_ERR "IMX AHCI can't get clock.\n"); + } else { + clk_disable(clk); + clk_put(clk); + } + + return ret; +} + +static void sata_exit(struct device *dev) +{ + struct clk *clk; + + clk = clk_get(dev, "usb_phy1"); + if (IS_ERR(clk)) { + clk = NULL; + printk(KERN_ERR "IMX AHCI can't get USB PHY1 CLK.\n"); + } else { + clk_disable(clk); + clk_put(clk); + } + + clk = clk_get(dev, "imx_sata_clk"); + if (IS_ERR(clk)) { + clk = NULL; + printk(KERN_ERR "IMX AHCI can't get clock.\n"); + } else { + clk_disable(clk); + clk_put(clk); + } +} + +static struct ahci_platform_data sata_data = { + .init = sata_init, + .exit = sata_exit, +}; + static void __init mx53_loco_board_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, @@ -215,6 +334,7 @@ static void __init mx53_loco_board_init(void) imx53_add_imx_i2c(1, &mx53_loco_i2c_data); imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); + imx53_add_ahci_imx(0, &sata_data); } static void __init mx53_loco_timer_init(void)