From patchwork Tue Mar 8 02:55:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 415 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:42:29 -0000 Delivered-To: patches@linaro.org Received: by 10.224.60.68 with SMTP id o4cs13105qah; Mon, 7 Mar 2011 18:56:11 -0800 (PST) Received: by 10.151.15.7 with SMTP id s7mr5805216ybi.57.1299552970752; Mon, 07 Mar 2011 18:56:10 -0800 (PST) Received: from VA3EHSOBE005.bigfish.com (va3ehsobe005.messaging.microsoft.com [216.32.180.31]) by mx.google.com with ESMTPS id q37si1159503yba.50.2011.03.07.18.56.10 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 07 Mar 2011 18:56:10 -0800 (PST) Received-SPF: neutral (google.com: 216.32.180.31 is neither permitted nor denied by best guess record for domain of Hong-Xing.Zhu@freescale.com) client-ip=216.32.180.31; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.180.31 is neither permitted nor denied by best guess record for domain of Hong-Xing.Zhu@freescale.com) smtp.mail=Hong-Xing.Zhu@freescale.com Received: from mail121-va3-R.bigfish.com (10.7.14.250) by VA3EHSOBE005.bigfish.com (10.7.40.25) with Microsoft SMTP Server id 14.1.225.8; Tue, 8 Mar 2011 02:56:09 +0000 Received: from mail121-va3 (localhost.localdomain [127.0.0.1]) by mail121-va3-R.bigfish.com (Postfix) with ESMTP id F379C19B00B3; Tue, 8 Mar 2011 02:56:08 +0000 (UTC) X-SpamScore: -2 X-BigFish: VS-2(zzbb2cKzz1202hzz8275bh1497iz2dh2a8h668h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:az33egw02.freescale.net; RD:az33egw02.freescale.net; EFVD:NLI Received: from mail121-va3 (localhost.localdomain [127.0.0.1]) by mail121-va3 (MessageSwitch) id 1299552968692515_24168; Tue, 8 Mar 2011 02:56:08 +0000 (UTC) Received: from VA3EHSMHS001.bigfish.com (unknown [10.7.14.246]) by mail121-va3.bigfish.com (Postfix) with ESMTP id A4BF11150050; Tue, 8 Mar 2011 02:56:08 +0000 (UTC) Received: from az33egw02.freescale.net (192.88.158.103) by VA3EHSMHS001.bigfish.com (10.7.99.11) with Microsoft SMTP Server (TLS) id 14.1.225.22; Tue, 8 Mar 2011 02:56:05 +0000 Received: from az33smr01.freescale.net (az33smr01.freescale.net [10.64.34.199]) by az33egw02.freescale.net (8.14.3/8.14.3) with ESMTP id p282tvsI023049; Mon, 7 Mar 2011 19:55:58 -0700 (MST) Received: from x-VirtualBox.ap.freescale.net (x-VirtualBox.ap.freescale.net [10.192.242.62]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p282tcqf023077; Mon, 7 Mar 2011 20:55:53 -0600 (CST) From: Richard Zhu To: CC: , , , , , , , , , Richard Zhu Subject: [PATCH V6 4/4] mmc: sdhci-esdhc: enable esdhc on imx53 Date: Tue, 8 Mar 2011 10:55:36 +0800 Message-ID: <1299552936-17202-4-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1299552936-17202-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1299552936-17202-1-git-send-email-Hong-Xing.Zhu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Fix the NO INT in the Multi-BLK IO in SD/MMC, and Multi-BLK read in SDIO on imx53. The CMDTYPE of the CMD register (offset 0xE) should be set to "11" when the STOP CMD12 is issued on imx53 to abort one open ended multi-blk IO. Otherwise one the TC INT wouldn't be generated. In exact block transfer, the controller doesn't complete the operations automatically as required at the end of the transfer and remains on hold if the abort command is not sent on imx53. As a result, the TC flag is not asserted and SW received timeout exeception. set bit1 of Vendor Spec registor to fix it. Signed-off-by: Richard Zhu Signed-off-by: Richard Zhao --- drivers/mmc/host/sdhci-esdhc-imx.c | 42 ++++++++++++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 5768e06..96d131e 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -19,13 +19,31 @@ #include #include #include +#include +#include #include #include #include "sdhci.h" #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" +/* VENDOR SPEC register */ +#define SDHCI_VENDOR_SPEC 0xC0 +#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 + #define IMX_GPIO_CD_WP (1 << 0) +/* + * The CMDTYPE of the CMD register (offset 0xE) should be set to + * "11" when the STOP CMD12 is issued on imx53 to abort one + * open ended multi-blk IO. Otherwise the TC INT wouldn't + * be generated. + * In exact block transfer, the controller doesn't complete the + * operations automatically as required at the end of the + * transfer and remains on hold if the abort command is not sent. + * As a result, the TC flag is not asserted and SW received timeout + * exeception. Bit1 of Vendor Spec registor is used to fix it. + */ +#define IMX_MULTIBLK_NO_INT (1 << 1) struct pltfm_imx_data { int flags; @@ -80,6 +98,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) */ val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); + if (unlikely((imx_data->flags & IMX_MULTIBLK_NO_INT) + && (reg == SDHCI_INT_STATUS) + && (val & SDHCI_INT_DATA_END))) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } + writel(val, host->ioaddr + reg); } @@ -103,9 +130,21 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) * Postpone this write, we must do it together with a * command write that is down below. */ + if ((host->cmd->opcode == SD_IO_RW_EXTENDED) + && (host->cmd->data->blocks > 1) + && (host->cmd->data->flags & MMC_DATA_READ) + && (imx_data->flags & IMX_MULTIBLK_NO_INT)) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } imx_data->mod_val = val; return; case SDHCI_COMMAND: + if ((host->cmd->opcode == MMC_STOP_TRANSMISSION) + && (imx_data->flags & IMX_MULTIBLK_NO_INT)) + val |= SDHCI_CMD_ABORTCMD; writel(val << 16 | imx_data->mod_val, host->ioaddr + SDHCI_TRANSFER_MODE); return; @@ -213,6 +252,9 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro; } + if (!(cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx51())) + imx_data->flags |= IMX_MULTIBLK_NO_INT; + if (boarddata) { err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP"); if (err) {