Message ID | 20240523111322.19243-3-cuiyunhui@bytedance.com |
---|---|
State | New |
Headers | show |
Series | [RESEND,v5,1/3] riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init() | expand |
Hi Palmer, Gentle ping ... On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote: > > After adding ACPI support to populate_cache_leaves(), RISC-V can build > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT > configuration. > > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > --- > arch/riscv/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index f961449ca077..a9ebecd72052 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -14,6 +14,7 @@ config RISCV > def_bool y > select ACPI_GENERIC_GSI if ACPI > select ACPI_REDUCED_HARDWARE_ONLY if ACPI > + select ACPI_PPTT if ACPI > select ARCH_DMA_DEFAULT_COHERENT > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > -- > 2.20.1 > Thanks, Yunhui
Hi Sunilvl, On Mon, May 27, 2024 at 8:51 PM yunhui cui <cuiyunhui@bytedance.com> wrote: > > Hi Palmer, > > Gentle ping ... > > On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote: > > > > After adding ACPI support to populate_cache_leaves(), RISC-V can build > > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT > > configuration. > > > > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> > > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > > --- > > arch/riscv/Kconfig | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index f961449ca077..a9ebecd72052 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -14,6 +14,7 @@ config RISCV > > def_bool y > > select ACPI_GENERIC_GSI if ACPI > > select ACPI_REDUCED_HARDWARE_ONLY if ACPI > > + select ACPI_PPTT if ACPI > > select ARCH_DMA_DEFAULT_COHERENT > > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > > -- > > 2.20.1 > > > > Thanks, > Yunhui Could you please review or ack this patchset again? Palmer did not respond. Link: https://lore.kernel.org/linux-riscv/20240523111322.19243-3-cuiyunhui@bytedance.com/T/ Thanks, Yunhui
Hi Yunhui, On Fri, Jun 07, 2024 at 04:44:36PM +0800, yunhui cui wrote: > Hi Sunilvl, > > > On Mon, May 27, 2024 at 8:51 PM yunhui cui <cuiyunhui@bytedance.com> wrote: > > > > Hi Palmer, > > > > Gentle ping ... > > > > On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote: > > > > > > After adding ACPI support to populate_cache_leaves(), RISC-V can build > > > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT > > > configuration. > > > > > > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> > > > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> > > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > > > --- > > > arch/riscv/Kconfig | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > > index f961449ca077..a9ebecd72052 100644 > > > --- a/arch/riscv/Kconfig > > > +++ b/arch/riscv/Kconfig > > > @@ -14,6 +14,7 @@ config RISCV > > > def_bool y > > > select ACPI_GENERIC_GSI if ACPI > > > select ACPI_REDUCED_HARDWARE_ONLY if ACPI > > > + select ACPI_PPTT if ACPI NIT: I would add this prior to ACPI_REDUCED_HARDWARE_ONLY. > > > select ARCH_DMA_DEFAULT_COHERENT > > > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > > > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > > > -- > > > 2.20.1 > > > > > > > Thanks, > > Yunhui > > Could you please review or ack this patchset again? Palmer did not respond. > > Link: > https://lore.kernel.org/linux-riscv/20240523111322.19243-3-cuiyunhui@bytedance.com/T/ > My bad, I was under the impression that I had Acked already. The series looks good to me except the nit above. Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Thanks, Sunil
Hi Sunil, On Fri, Jun 7, 2024 at 7:01 PM Sunil V L <sunilvl@ventanamicro.com> wrote: > > Hi Yunhui, > > On Fri, Jun 07, 2024 at 04:44:36PM +0800, yunhui cui wrote: > > Hi Sunilvl, > > > > > > On Mon, May 27, 2024 at 8:51 PM yunhui cui <cuiyunhui@bytedance.com> wrote: > > > > > > Hi Palmer, > > > > > > Gentle ping ... > > > > > > On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote: > > > > > > > > After adding ACPI support to populate_cache_leaves(), RISC-V can build > > > > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT > > > > configuration. > > > > > > > > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> > > > > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> > > > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> > > > > --- > > > > arch/riscv/Kconfig | 1 + > > > > 1 file changed, 1 insertion(+) > > > > > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > > > index f961449ca077..a9ebecd72052 100644 > > > > --- a/arch/riscv/Kconfig > > > > +++ b/arch/riscv/Kconfig > > > > @@ -14,6 +14,7 @@ config RISCV > > > > def_bool y > > > > select ACPI_GENERIC_GSI if ACPI > > > > select ACPI_REDUCED_HARDWARE_ONLY if ACPI > > > > + select ACPI_PPTT if ACPI > NIT: I would add this prior to ACPI_REDUCED_HARDWARE_ONLY. Okay, I will update it on v6. > > > > > select ARCH_DMA_DEFAULT_COHERENT > > > > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > > > > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > > > > -- > > > > 2.20.1 > > > > > > > > > > Thanks, > > > Yunhui > > > > Could you please review or ack this patchset again? Palmer did not respond. > > > > Link: > > https://lore.kernel.org/linux-riscv/20240523111322.19243-3-cuiyunhui@bytedance.com/T/ > > > My bad, I was under the impression that I had Acked already. The series > looks good to me except the nit above. > > Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> > > Thanks, > Sunil Thanks, Yunhui
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index f961449ca077..a9ebecd72052 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -14,6 +14,7 @@ config RISCV def_bool y select ACPI_GENERIC_GSI if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI + select ACPI_PPTT if ACPI select ARCH_DMA_DEFAULT_COHERENT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2