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Wysocki" , Len Brown Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, lukas@wunner.de, mika.westerberg@linux.intel.com, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1862; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=FdIlecklqovWUvrpfyhP9M3zVKU0Sq4nhdASMDLOLeM=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmAqgV8B1oRhS/KEisLhilKgX2Z9YTFnu8il8dh f9ajS7O2tWJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZgKoFQAKCRBVnxHm/pHO 9eXUB/9NbhfHS2KhKNmrNgI0BRCyWwQs5Z61KL+HT/cENsQwy5+PBFop3vvKi5jAjCjl2F2llnV azk7wpPnz6M+RGS/kui+2NwlCPvmI2RSGReR8pmDUlW7dUL1MURBFvS9BrbA2GweE46rGR3GwCn zd6e4YlTwdT1bawePXF0Ovy39OdzdchHvn6R9RSCqaMulgoYAPPgdZACD1yY0TZh1bk4AbzGLTI V905mcjIEhpdM0/BDSMVr8EQDY+x6xFxuouAXOFl8RutypXrd6J459cVerSyAICab9gWMzhvoUf JJR1oISium2mQig51ikU2pslp2AlKXazrJbOLS7KrgkQcA3d X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Unlike ACPI based platforms, there are no known issues with D3Hot for the PCI bridges in the Devicetree based platforms. So let's allow the PCI bridges to go to D3Hot during runtime. It should be noted that the bridges need to be defined in Devicetree for this to work. Currently, D3Cold is not allowed since Vcc supply which is required for transitioning the device to D3Cold is not exposed on all Devicetree based platforms. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/pci.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 48e2ca0cd8a0..2fe9defa69e3 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2992,6 +2992,18 @@ static bool pci_bridge_d3_allowed(struct pci_dev *bridge, pci_power_t state) if (pci_bridge_d3_force) return true; + /* + * Allow D3Hot for all Devicetree based platforms having a + * separate node for the bridge. We don't allow D3Cold for now + * since not all platforms are exposing the Vcc supply in + * Devicetree which is required for transitioning the bridge to + * D3Cold. + * + * NOTE: The bridge is expected to be defined in Devicetree. + */ + if (state == PCI_D3hot && dev_of_node(&bridge->dev)) + return true; + /* Even the oldest 2010 Thunderbolt controller supports D3. */ if (bridge->is_thunderbolt) return true; @@ -3042,7 +3054,7 @@ bool pci_bridge_d3cold_allowed(struct pci_dev *bridge) * * This function checks if the bridge is allowed to move to D3Hot. * Currently we only allow D3Hot for recent enough PCIe ports on ACPI based - * platforms and Thunderbolt. + * platforms, Thunderbolt and Devicetree based platforms. */ bool pci_bridge_d3hot_allowed(struct pci_dev *bridge) {