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Wysocki" , Mark Gross , "Andreas Noever" , Michael Jamet , Yehezkel Bernat , =?utf-8?q?Pali_Roh=C3=A1r?= , =?utf-8?q?Marek_Beh=C3=BAn?= , "Maciej W . Rozycki" , Manivannan Sadhasivam , Mario Limonciello , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS" , "open list" , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:PCI SUBSYSTEM" , "open list:ACPI" , "open list:X86 PLATFORM DRIVERS" , "open list:THUNDERBOLT DRIVER" Subject: [PATCH v2 7/9] PCI: ACPI: Detect PCIe root ports that are used for tunneling Date: Fri, 3 Nov 2023 14:07:56 -0500 Message-ID: <20231103190758.82911-8-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231103190758.82911-1-mario.limonciello@amd.com> References: <20231103190758.82911-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044EF:EE_|LV8PR12MB9231:EE_ X-MS-Office365-Filtering-Correlation-Id: a5b2457e-15b6-4a57-e1e3-08dbdca049d5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RijnE6ToB9ggfAu8en5ipXcGmL3JY+sd1LC0IBROqrHg2EUjPqORlIT9UpmR7jZMfYR8FagjDYL+bsXkqcUZvpt8zr/wnPDMWKajMVlayZ2fm1QIDHU/99ii931BKNCeVc07YQlt3j6/eRfZMIESSMZksOE7BMCbjHLNWTMQPShcwT9NmIBqHYZrQTL9sOncay6Msb20xL+pHJEBM21UTZUy68+fJ9WOqNnJhcg54cVu5QhnO1zOKCPA9lJgnW/OVUjXdiLNiusdFRstUngm4CRtogDWXYn8ngluhDxUyUWPgw+UUbq5Ldc/gj+M7czn+U247xl1O4vQC2+FHLF1nW4Fz3OegaRUYw3OIDt1YSpUIRAZEAd4H1tqzlSiAdVxFyeZbUQkprEz08xKKhCU5Fv4j7/LKyYf1OjKQ6Z6plmk5YpWYNdHhECuRy15ADmLmFAR4VHS3zuySbVCPKJclOVSAz1m0Hj8nJxOzxlgzkn/0qK1cA8ZFGcOfrdx+v8QKltqCagiDU2Z7Dq7FHqf537GLcQZ01Bdl5vLylpH6gkxVjIZdeNCQxQ1FaX2uOvSMH8diA4No9HHZkQEvGlN7yv4p3g9G8pjMZvypzVVkUd95Q4e6v9PlHlWhCGV1A1E8n0YQae4PRlJ8zzm7MQ/fntp0uVu32z8N2OsvodA5l6LwHdbnFtI1vFVb4/mYWJtJ0Kr0qwGE88ZZ67xsDbVRRy0NsxuXIJ/VdefVARSM5VUGbVPCsFtcndbkcdRIq4tydVmJRYiGqGHuk2/WjB9V6hf5KPs8j8ma76EU4mRWltwn1b6PehhWriFPzSyLTIG X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(136003)(396003)(346002)(39860400002)(376002)(230273577357003)(230173577357003)(230922051799003)(82310400011)(1800799009)(64100799003)(451199024)(186009)(40470700004)(46966006)(36840700001)(36860700001)(47076005)(66574015)(336012)(16526019)(426003)(2616005)(1076003)(6666004)(26005)(83380400001)(7696005)(316002)(478600001)(70206006)(110136005)(966005)(54906003)(81166007)(356005)(70586007)(82740400003)(8676002)(8936002)(44832011)(41300700001)(40460700003)(40480700001)(4326008)(86362001)(2906002)(7416002)(5660300002)(36756003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2023 19:08:39.3126 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a5b2457e-15b6-4a57-e1e3-08dbdca049d5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9231 USB4 routers support a feature called "PCIe tunneling". This allows PCIe traffic to be transmitted over USB4 fabric. PCIe root ports that are used in this fashion can be discovered by device specific data that specifies the USB4 router they are connected to. For the PCI core, the specific connection information doesn't matter, but it's interesting to know that this root port is used for tunneling traffic. This will allow other decisions to be made based upon it. Detect the `usb4-host-interface` _DSD and if it's found save it into the `is_tunneling` bit in `struct pci_device`. Link: https://www.usb.org/document-library/usb4r-specification-v20 USB4 V2 with Errata and ECN through June 2023 Section 2.2.10.3 Link: https://learn.microsoft.com/en-us/windows-hardware/design/component-guidelines/usb4-acpi-requirements#port-mapping-_dsd-for-usb-3x-and-pcie Signed-off-by: Mario Limonciello --- drivers/pci/pci-acpi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 05b7357bd258..81dbfd335f34 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1414,12 +1414,28 @@ static void pci_acpi_set_external_facing(struct pci_dev *dev) dev->external_facing = 1; } +static void pci_acpi_set_tunneling(struct pci_dev *dev) +{ + if (!pci_is_pcie(dev)) + return; + + switch (pci_pcie_type(dev)) { + case PCI_EXP_TYPE_ROOT_PORT: + case PCI_EXP_TYPE_DOWNSTREAM: + dev->is_tunneled = device_property_present(&dev->dev, "usb4-host-interface"); + break; + default: + return; + } +} + void pci_acpi_setup(struct device *dev, struct acpi_device *adev) { struct pci_dev *pci_dev = to_pci_dev(dev); pci_acpi_optimize_delay(pci_dev, adev->handle); pci_acpi_set_external_facing(pci_dev); + pci_acpi_set_tunneling(pci_dev); pci_acpi_add_edr_notifier(pci_dev); pci_acpi_add_pm_notifier(adev, pci_dev);