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Wysocki" , Mika Westerberg , Bjorn Helgaas CC: , , "Andy Shevchenko" , , Kuppuswamy Sathyanarayanan , "Iain Lane" , Shyam-sundar S-k , Mario Limonciello Subject: [PATCH v10 7/7] PCI: Use device constraints to decide PCI target state fallback policy Date: Fri, 4 Aug 2023 16:01:29 -0500 Message-ID: <20230804210129.5356-8-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230804210129.5356-1-mario.limonciello@amd.com> References: <20230804210129.5356-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE33:EE_|MN0PR12MB6127:EE_ X-MS-Office365-Filtering-Correlation-Id: be9ce5ce-d491-4873-8e3e-08db952e05b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7Q8yLEn4KTH2hgcJUhWl+OFhNZ1OoClzypJnSk+GlVP2JYmWIkov8r7l0FcGX3h7KqG00+mO6H7mLq58q80efBWrIoASgqXW4H+bT72crYgW9vGg7JTmodn0oJ/A+8xeq4oZ9mV1U4km8i1EDOBebRVpduZe+jK2mXALcaWryWvcS9/OctzMbpGbO9S4srNAaB3eZmaWNGy9RA4JZNqo1vK8uUe6BBuXA+LMZye18MC/KkzHCWV5pH5AP23fj89VbILrEEzB5cD3PpeT3W9JDRTqwp1Hs+P0il7ru64WeUmjRu9CTGzzaAdP9UkDYyGrWdkAmCcXDOxodBC0TevqgU+P6QgZETwLJSaT0WF8507bktkK8h9XKUTkcI6dHpEF9rYxk1hwxiilD9651DPi5up2fcpWWqjaheLfaVjE+vr/iUrg13+2qUJkhGr6yorbMldEcPZ/3EBOB/J7wygYqE+GOuW+TiuJ2/wORVBuTQuhid19C0E/ypK2TZMqwGlxc3sQt4s4ttYAwhEZlboeMJbUnTd2pROh1JoUR4L4TMwuQVEttr3VCa/QuyRVHMMS4srDQnw5RsBSSNugV6wzJErYV5qOf49kw7jkTnWd4mvIee4L9BroDzTBnekamQlimZVXmhjnzUBGaAMHKO6JRde1chnkuRA9KaR80ZFxKbYSKKgk2XGtfcenslECHyZ+q22pmkxz+ty2WjuyPp3yk6QOTOwZhNBfR3xTMXbSeFgz0FnRRFKMGrzG2lWdzlLPyO8ODloOOVbPV/wC6fP4SW49A3DqXeXeayQVU6v/t70= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230028)(4636009)(376002)(346002)(396003)(39860400002)(136003)(451199021)(82310400008)(1800799003)(186006)(36840700001)(40470700004)(46966006)(83380400001)(40460700003)(16526019)(2616005)(1076003)(26005)(8676002)(47076005)(4326008)(2906002)(36860700001)(316002)(426003)(70586007)(81166007)(5660300002)(70206006)(40480700001)(44832011)(8936002)(41300700001)(6666004)(966005)(7696005)(110136005)(478600001)(54906003)(356005)(36756003)(86362001)(336012)(82740400003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Aug 2023 21:01:49.8716 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: be9ce5ce-d491-4873-8e3e-08db952e05b4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE33.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6127 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Since commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") PCIe ports from modern machines (>=2015) are allowed to be put into D3 by storing a value to the `bridge_d3` variable in the `struct pci_dev` structure. pci_power_manageable() uses this variable to indicate a PCIe port can enter D3. pci_pm_suspend_noirq() uses the return from pci_power_manageable() to decide whether to try to put a device into its target state for a sleep cycle via pci_prepare_to_sleep(). For devices that support D3, the target state is selected by this policy: 1. If platform_pci_power_manageable(): Use platform_pci_choose_state() 2. If the device is armed for wakeup: Select the deepest D-state that supports a PME. 3. Else: Use D3hot. Devices are considered power manageable by the platform when they have one or more objects described in the table in section 7.3 of the ACPI 6.5 specification. When devices are not considered power manageable; specs are ambiguous as to what should happen. In this situation Windows 11 leaves PCIe ports in D0 while Linux puts them into D3 due to the above mentioned commit. In Windows systems that support Modern Standby specify hardware pre-conditions for the SoC to achieve the lowest power state by device constraints in a SOC specific "Power Engine Plugin" (PEP) [2] [3]. They can be marked as disabled or enabled and when enabled can specify the minimum power state required for an ACPI device. When it is ambiguous what should happen, adjust the logic for pci_target_state() to check whether a device constraint is present and enabled. * If power manageable by ACPI use this to get to select target state * If a device constraint is present but disabled then choose D0 * If a device constraint is present and enabled then use it * If a device constraint is not present, then continue to existing logic (if marked for wakeup use deepest state that PME works) * If not marked for wakeup choose D3hot Link: https://uefi.org/specs/ACPI/6.5/07_Power_and_Performance_Mgmt.html#device-power-management-objects [1] Link: https://learn.microsoft.com/en-us/windows-hardware/design/device-experiences/platform-design-for-modern-standby#low-power-core-silicon-cpu-soc-dram [2] Link: https://uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf [3] Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") Reported-by: Iain Lane Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121 Signed-off-by: Mario Limonciello --- v9->v10: * kerneldoc fixes * split into more patches * adjust return variable handling * Adjust call-site to avoid problems for devices already in d3cold --- drivers/pci/pci.c | 47 ++++++++++++++++++++++++++++++++++------------- 1 file changed, 34 insertions(+), 13 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 60230da957e0c..108eacc4f8dd9 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1082,6 +1082,14 @@ static inline bool platform_pci_bridge_d3(struct pci_dev *dev) return acpi_pci_bridge_d3(dev); } +static inline int platform_get_constraint(struct pci_dev *dev) +{ + if (pci_use_mid_pm()) + return -ENODEV; + + return acpi_get_lps0_constraint(&dev->dev); +} + /** * pci_update_current_state - Read power state of given device and cache it * @dev: PCI device to handle. @@ -2660,6 +2668,20 @@ int pci_wake_from_d3(struct pci_dev *dev, bool enable) } EXPORT_SYMBOL(pci_wake_from_d3); +/* + * Find the deepest state from which the device can generate + * PME#. + */ +static pci_power_t pci_get_wake_pme_state(struct pci_dev *dev) +{ + pci_power_t state = PCI_D3hot; + + while (state && !(dev->pme_support & (1 << state))) + state--; + + return state; +} + /** * pci_target_state - find an appropriate low power state for a given PCI dev * @dev: PCI device @@ -2671,6 +2693,8 @@ EXPORT_SYMBOL(pci_wake_from_d3); */ static pci_power_t pci_target_state(struct pci_dev *dev, bool wakeup) { + pci_power_t constraint; + if (platform_pci_power_manageable(dev)) { /* * Call the platform to find the target state for the device. @@ -2701,23 +2725,20 @@ static pci_power_t pci_target_state(struct pci_dev *dev, bool wakeup) else if (!dev->pm_cap) return PCI_D0; - if (wakeup && dev->pme_support) { - pci_power_t state = PCI_D3hot; + /* if platform indicates preferred state device constraint, use it */ + constraint = platform_get_constraint(dev); + if (constraint < 0) + constraint = PCI_D3hot; - /* - * Find the deepest state from which the device can generate - * PME#. - */ - while (state && !(dev->pme_support & (1 << state))) - state--; + if (wakeup && dev->pme_support) { + pci_power_t pme_state = pci_get_wake_pme_state(dev); - if (state) - return state; - else if (dev->pme_support & 1) - return PCI_D0; + /* pick the lesser of any specified constraints */ + if (pme_state < constraint) + constraint = pme_state; } - return PCI_D3hot; + return constraint; } /**