[V3,19/20] RISC-V: Enable ACPI in defconfig

Message ID	20230303133647.845095-20-sunilvl@ventanamicro.com
State	Superseded
Headers	show Return-Path: <linux-acpi-owner@vger.kernel.org> From: Sunil V L <sunilvl@ventanamicro.com> To: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, "Rafael J . Wysocki" <rafael@kernel.org>, Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Jonathan Corbet <corbet@lwn.net>, Anup Patel <apatel@ventanamicro.com>, Andrew Jones <ajones@ventanamicro.com>, Atish Patra <atishp@rivosinc.com>, 'Conor Dooley ' <conor.dooley@microchip.com>, Sunil V L <sunilvl@ventanamicro.com>, "Rafael J . Wysocki" <rafael.j.wysocki@intel.com> Subject: [PATCH V3 19/20] RISC-V: Enable ACPI in defconfig Date: Fri, 3 Mar 2023 19:06:46 +0530 Message-Id: <20230303133647.845095-20-sunilvl@ventanamicro.com> In-Reply-To: <20230303133647.845095-1-sunilvl@ventanamicro.com> References: <20230303133647.845095-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add basic ACPI support for RISC-V \| expand [V3,00/20] Add basic ACPI support for RISC-V [V3,01/20] riscv: move sbi_init() earlier before jump_label_init() [V3,02/20] ACPICA: MADT: Add RISC-V INTC interrupt controller [V3,03/20] ACPICA: Add structure definitions for RISC-V RHCT [V3,04/20] ACPI: tables: Print RINTC information when MADT is parsed [V3,05/20] ACPI: OSL: Make should_use_kmap() 0 for RISC-V [V3,06/20] RISC-V: Add support to build the ACPI core [V3,07/20] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid [V3,08/20] drivers/acpi: RISC-V: Add RHCT related code [V3,09/20] RISC-V: smpboot: Create wrapper smp_setup() [V3,10/20] RISC-V: smpboot: Add ACPI support in smp_setup() [V3,11/20] RISC-V: ACPI: Cache and retrieve the RINTC structure [V3,12/20] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() [V3,13/20] RISC-V: cpu: Enable cpuinfo for ACPI systems [V3,14/20] irqchip/riscv-intc: Add ACPI support [V3,15/20] clocksource/timer-riscv: Refactor riscv_timer_init_dt() [V3,16/20] clocksource/timer-riscv: Add ACPI support [V3,17/20] RISC-V: time.c: Add ACPI support for time_init() [V3,18/20] RISC-V: Add ACPI initialization in setup_arch() [V3,19/20] RISC-V: Enable ACPI in defconfig [V3,20/20] MAINTAINERS: Add entry for drivers/acpi/riscv

Message ID

20230303133647.845095-20-sunilvl@ventanamicro.com

State

Superseded

Headers

From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        "Rafael J . Wysocki" <rafael@kernel.org>,
        Len Brown <lenb@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Jonathan Corbet <corbet@lwn.net>,
        Anup Patel <apatel@ventanamicro.com>,
        Andrew Jones <ajones@ventanamicro.com>,
        Atish Patra <atishp@rivosinc.com>,
        'Conor Dooley ' <conor.dooley@microchip.com>,
        Sunil V L <sunilvl@ventanamicro.com>,
        "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>
Subject: [PATCH V3 19/20] RISC-V: Enable ACPI in defconfig
Date: Fri,  3 Mar 2023 19:06:46 +0530
Message-Id: <20230303133647.845095-20-sunilvl@ventanamicro.com>
In-Reply-To: <20230303133647.845095-1-sunilvl@ventanamicro.com>
References: <20230303133647.845095-1-sunilvl@ventanamicro.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

Add basic ACPI support for RISC-V | expand

Add support to build ACPI subsystem in defconfig. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+)

Comments

Andrew Jones March 3, 2023, 4:23 p.m. UTC | #1

On Fri, Mar 03, 2023 at 07:06:46PM +0530, Sunil V L wrote:
> Add support to build ACPI subsystem in defconfig.
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
>  arch/riscv/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index d98d6e90b2b8..8822b49ddb59 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -238,3 +238,4 @@ CONFIG_RCU_EQS_DEBUG=y
>  # CONFIG_FTRACE is not set
>  # CONFIG_RUNTIME_TESTING_MENU is not set
>  CONFIG_MEMTEST=y
> +CONFIG_ACPI=y
> -- 
> 2.34.1
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

Conor Dooley March 6, 2023, 9:18 p.m. UTC | #2

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index d98d6e90b2b8..8822b49ddb59 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -238,3 +238,4 @@  CONFIG_RCU_EQS_DEBUG=y
 # CONFIG_FTRACE is not set
 # CONFIG_RUNTIME_TESTING_MENU is not set
 CONFIG_MEMTEST=y
+CONFIG_ACPI=y

[V3,19/20] RISC-V: Enable ACPI in defconfig

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Comments

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