From patchwork Fri Jul 16 08:34:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 478373 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp1146778jao; Fri, 16 Jul 2021 01:35:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzy6xapFuvFAFyK1VcPcaZfmbArwQFnAfPT/tJWJqcYyrvtm6/ApylYFlAd/+vHISzDfctx X-Received: by 2002:a05:6402:d54:: with SMTP id ec20mr13493853edb.41.1626424559054; Fri, 16 Jul 2021 01:35:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626424559; cv=none; d=google.com; s=arc-20160816; b=0NkPXUueETAVyHX308qkQyMQpbKl5qTIal1AoxQ9uNyyEGR/be52irEjOHj2QSCECY JaCTiaBydLhUgrhy70jQc0jFUltxTxny3ttryC16XXEoa2w1oy5Mg8FxaZB4gIgFparu Bv3FNLr/wTA+5/ZoE2hcqUc0JqVP6Z/Iu67umEg3VZBrIxRsGygkbt3pn3exQu58Y2OO fIV+83RdQ5bQ3c2YCsVcSS8ci+WOYXNkOXz/ijdDgZk4hu1K9d098QEj6qH1NL38mnnt 8IDDy6bhMDEdRZgVYDHj/eFWXTJ69N3m8ain37Ca2A8Mk4hyPceEcuGzBnNWtqFzmMxw oDAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=Zewr59NfwZxooTCWnPSVVwvFIPDjWkBCXZn96QttlWM=; b=TvAUN2QvPhG4qgNXiII+weFO+OQxVytLnozpZE4DHo7pUQL743MwuXhUc6iU1BHk5v Bw4YBP/DD6xEU98OgEK169JL3YDPXYvHu7w4LUpSj3JAMGro+5Mn/aZs84XO0kkS411V 28QW46GffdoCHX/GPuPs73FkCOMh3Q739GAlAqfgRKE/ym3e0RVIsZX2JJOOb+O2eOMp METn0g77vn4lvJjHAbHThDBGEVZrFAUCIw3hqoTNO7JKZR9+/F86GaQk1WZehpCyo3YA sFwQl4aPPzuuHYQ40hxkmuTkHaVL4krLZwQNTn4AjQPz39TTmnSigani+eXp02ky7/KX Vncg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dd21si2610993edb.514.2021.07.16.01.35.58; Fri, 16 Jul 2021 01:35:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231899AbhGPIiw (ORCPT + 4 others); Fri, 16 Jul 2021 04:38:52 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]:3425 "EHLO frasgout.his.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232016AbhGPIiw (ORCPT ); Fri, 16 Jul 2021 04:38:52 -0400 Received: from fraeml705-chm.china.huawei.com (unknown [172.18.147.200]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4GR46K4vNgz6H7P4; Fri, 16 Jul 2021 16:24:41 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml705-chm.china.huawei.com (10.206.15.54) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Fri, 16 Jul 2021 10:35:55 +0200 Received: from A2006125610.china.huawei.com (10.47.80.222) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Fri, 16 Jul 2021 09:35:49 +0100 From: Shameer Kolothum To: , , CC: , , , , , , , , , , Subject: [PATCH v6 8/9] iommu/arm-smmu: Get associated RMR info and install bypass SMR Date: Fri, 16 Jul 2021 09:34:41 +0100 Message-ID: <20210716083442.1708-9-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210716083442.1708-1-shameerali.kolothum.thodi@huawei.com> References: <20210716083442.1708-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.80.222] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Jon Nettleton Check if there is any RMR info associated with the devices behind the SMMU and if any, install bypass SMRs for them. This is to keep any ongoing traffic associated with these devices alive when we enable/reset SMMU during probe(). Signed-off-by: Jon Nettleton Signed-off-by: Steven Price Signed-off-by: Shameer Kolothum --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 48 +++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index f22dbeb1e510..e9fb3d962a86 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -2063,6 +2063,50 @@ err_reset_platform_ops: __maybe_unused; return err; } +static void arm_smmu_rmr_install_bypass_smr(struct arm_smmu_device *smmu) +{ + struct list_head rmr_list; + struct iommu_resv_region *e; + int i, cnt = 0; + u32 reg; + + INIT_LIST_HEAD(&rmr_list); + if (iommu_dma_get_rmrs(dev_fwnode(smmu->dev), &rmr_list)) + return; + + /* + * Rather than trying to look at existing mappings that + * are setup by the firmware and then invalidate the ones + * that do no have matching RMR entries, just disable the + * SMMU until it gets enabled again in the reset routine. + */ + reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0); + reg &= ~ARM_SMMU_sCR0_CLIENTPD; + arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, reg); + + list_for_each_entry(e, &rmr_list, list) { + u32 sid = e->fw_data.rmr.sid; + + i = arm_smmu_find_sme(smmu, sid, ~0); + if (i < 0) + continue; + if (smmu->s2crs[i].count == 0) { + smmu->smrs[i].id = sid; + smmu->smrs[i].mask = 0; + smmu->smrs[i].valid = true; + } + smmu->s2crs[i].count++; + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + + cnt++; + } + + dev_notice(smmu->dev, "\tpreserved %d boot mapping%s\n", cnt, + cnt == 1 ? "" : "s"); + iommu_dma_put_rmrs(dev_fwnode(smmu->dev), &rmr_list); +} + static int arm_smmu_device_probe(struct platform_device *pdev) { struct resource *res; @@ -2189,6 +2233,10 @@ static int arm_smmu_device_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, smmu); + + /* Check for RMRs and install bypass SMRs if any */ + arm_smmu_rmr_install_bypass_smr(smmu); + arm_smmu_device_reset(smmu); arm_smmu_test_smr_masks(smmu);