From patchwork Mon May 24 11:02:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 446440 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp3238693jac; Mon, 24 May 2021 04:04:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwGMsM9tkJGDSmwmRSywIYZdVEf7eBEjRyuEP65cYiBOgE+uR2SQMoo95jvg5O5lhJeB/Vj X-Received: by 2002:a02:5b0a:: with SMTP id g10mr19031443jab.2.1621854274523; Mon, 24 May 2021 04:04:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621854274; cv=none; d=google.com; s=arc-20160816; b=K0E/r+leokEfiKS2FzE4rn2Nj/xU5iS9SdPp1px8+vLrtn297wfqHIUxjbFDbttImM 4EupbC7olIo0xxsxEUojeGCGE7B1ixQXu/CTg9/hewOzZGaiDHJQi0xu/4l5PPIl5nEV c3vwWYP7U56MzJUv2J+2pjA4N4zWqQLgUj5mj6ALpo3hTVGY9VL3cGUV+A6aAYKrh44M Rf/Jl6CWnonm0u3Qxh/DFDYaTEnk7XvWDXIeQVsr02LHfBv6hgvSDtnE3OoO/PJ/oo04 /F+kePSASpQIYagTJLo3mHOapcQg4/P8uamY7guQys6aaRdXoSEktfb47jzfq9Fp8shI VcMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=Mlw12trvDarIo7h+JXOKg9VcRbXPK5wuHCykKTCEQ/0=; b=wqvDvfVjL7pFj508jVvITvKq7o5hqqF01Sr/VEcZ3msKREw4uug1Jun51iJGMv18x3 swTU7DAA9Hxfn/s7BDbzWI8aGGOGXpsrc74uboy1usjlOiOfqO20NCyryLFyR6L6AooW b1TZ7fXRoHNVlRiO0SB+epK7shWrkFIBxULjuonUSfzvIm39L1m57YzVdMS7EvQ5ZMtC w1+amzXzPZt05TO7kx+an51HOMf4zx0TFAmijLctOYzznbdVzzuaW3qBMlUN6Ux43oGl vu0ckUDAxgffo3J6pMyoWyQ1aNM/LMSDyOk1cEQg6K2pB/1JNu/zY9T+L57zC7u7gfKr Yjtw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f14si12766626ilj.120.2021.05.24.04.04.34; Mon, 24 May 2021 04:04:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232494AbhEXLGA (ORCPT + 4 others); Mon, 24 May 2021 07:06:00 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3642 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232547AbhEXLF6 (ORCPT ); Mon, 24 May 2021 07:05:58 -0400 Received: from dggems706-chm.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FpZ514N5BzNyyy; Mon, 24 May 2021 19:00:53 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by dggems706-chm.china.huawei.com (10.3.19.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 24 May 2021 19:04:28 +0800 Received: from A2006125610.china.huawei.com (10.47.80.77) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 24 May 2021 12:04:18 +0100 From: Shameer Kolothum To: , , CC: , , , , , , , , , , Subject: [PATCH v5 8/8] iommu/dma: Reserve any RMR regions associated with a dev Date: Mon, 24 May 2021 12:02:22 +0100 Message-ID: <20210524110222.2212-9-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20210524110222.2212-1-shameerali.kolothum.thodi@huawei.com> References: <20210524110222.2212-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.80.77] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Get ACPI IORT RMR regions associated with a dev reserved so that there is a unity mapping for them in SMMU. Signed-off-by: Shameer Kolothum --- drivers/iommu/dma-iommu.c | 56 +++++++++++++++++++++++++++++++++++---- 1 file changed, 51 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index f893d460cfa4..c68093f48816 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -207,22 +207,68 @@ void iommu_dma_put_rmrs(struct fwnode_handle *iommu_fwnode, } EXPORT_SYMBOL(iommu_dma_put_rmrs); +static bool iommu_dma_dev_has_rmr(struct iommu_fwspec *fwspec, + struct iommu_resv_region *e) +{ + int i; + + for (i = 0; i < fwspec->num_ids; i++) { + if (e->fw_data.rmr.sid == fwspec->ids[i]) + return true; + } + + return false; +} + +static void iommu_dma_get_rmr_resv_regions(struct device *dev, + struct list_head *list) +{ + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct list_head rmr_list; + struct iommu_resv_region *rmr, *tmp; + + INIT_LIST_HEAD(&rmr_list); + if (iommu_dma_get_rmrs(fwspec->iommu_fwnode, &rmr_list)) + return; + + if (dev_is_pci(dev)) { + struct pci_dev *pdev = to_pci_dev(dev); + struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus); + + if (!host->preserve_config) + return; + } + + list_for_each_entry_safe(rmr, tmp, &rmr_list, list) { + if (!iommu_dma_dev_has_rmr(fwspec, rmr)) + continue; + + /* Remove from iommu RMR list and add to dev resv_regions */ + list_del_init(&rmr->list); + list_add_tail(&rmr->list, list); + } + + iommu_dma_put_rmrs(fwspec->iommu_fwnode, &rmr_list); +} + /** * iommu_dma_get_resv_regions - Reserved region driver helper * @dev: Device from iommu_get_resv_regions() * @list: Reserved region list from iommu_get_resv_regions() * * IOMMU drivers can use this to implement their .get_resv_regions callback - * for general non-IOMMU-specific reservations. Currently, this covers GICv3 - * ITS region reservation on ACPI based ARM platforms that may require HW MSI - * reservation. + * for general non-IOMMU-specific reservations. Currently this covers, + * -GICv3 ITS region reservation on ACPI based ARM platforms that may + * require HW MSI reservation. + * -Any ACPI IORT RMR memory range reservations (IORT spec rev E.b) */ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { - if (!is_of_node(dev_iommu_fwspec_get(dev)->iommu_fwnode)) + if (!is_of_node(dev_iommu_fwspec_get(dev)->iommu_fwnode)) { iort_iommu_msi_get_resv_regions(dev, list); - + iommu_dma_get_rmr_resv_regions(dev, list); + } } EXPORT_SYMBOL(iommu_dma_get_resv_regions);