From patchwork Fri Oct 6 14:04:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 115071 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1841248qgn; Fri, 6 Oct 2017 07:10:32 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDtG0AcEtv2RC1jgbqjIF3haDHg8CK/c6PENJTHFkJpKb+vuzv7oE46NNqGcAigLKXLQzBh X-Received: by 10.99.43.6 with SMTP id r6mr2100381pgr.353.1507299032383; Fri, 06 Oct 2017 07:10:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507299032; cv=none; d=google.com; s=arc-20160816; b=nfaV0Of/sPJoAjUUjlhkrmkzg2CNsXF3gShUw5JuB5gTeW4jIDVbRv5yYcmwGpOh7t UmBfqy5/aAIzidyatM9I6zHDOpvbi0UG4ZqNTEeBcZthmyWIlB1thlAW4PUgKOvt0eF4 wU2C5I846u7lQDn7UxwR+BhDjC4xEzbpk5/EaFoCry5oYbdoUeEMwtvEhZY2kXvs6RJ1 aEvB/4aGH/QrPPXsFFBWItfM5JFWI6uyPV0eEvbRIfxy39v60WFnLvRVac+3Iv99F4Y7 X1z7mjlu/IKonZMWN2a3Mlprfgmi4IprYai2kkIltraSgVU984crusdJy/Qq0JwGsUQT LZ8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=1O/1BMSlUSmJiWDWoniY23CeoGdoodmDRxOYh5QBrYQ=; b=QIl434dyKctPozX7hcyPtNmDLxOgT5FguuUYOmzDBRE0RS0pc+XQyBlktGRhyTZtVa yaziRVTrGaVKa8E6YATm+2+CZavFDngNUmVMXA0Zj+tbDnvqCVGOXW2K0xOYU6PyZcOe wNQuVyphW80luui+9gB8zqTtrYy8pCTDlO8BW0cL0Ah2KqvtdNAH0KFO7iW8jG+1CKBw O9QvHa9tfF78cX9nFZTqbI50ooerVlGZFAtK0jJ9JxXg5RFGYsJB3rgx2of3CE7BlA9N eTXTQLZQzRRqzsB1ldHKMLAB34w8x/lQJxHJHAUDsQZSaD4ML9DozT4ZH8Rn5KwKRteY b1rg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y131si1329734pfg.299.2017.10.06.07.10.32; Fri, 06 Oct 2017 07:10:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751866AbdJFOKb (ORCPT + 7 others); Fri, 6 Oct 2017 10:10:31 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7502 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751846AbdJFOKa (ORCPT ); Fri, 6 Oct 2017 10:10:30 -0400 Received: from 172.30.72.58 (EHLO DGGEMS403-HUB.china.huawei.com) ([172.30.72.58]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DIO33673; Fri, 06 Oct 2017 22:10:27 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.301.0; Fri, 6 Oct 2017 22:07:36 +0800 From: Shameer Kolothum To: , , , , , , , CC: , , , , , , , , , Shameer Kolothum Subject: [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Date: Fri, 6 Oct 2017 15:04:50 +0100 Message-ID: <20171006140450.89652-5-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20171006140450.89652-1-shameerali.kolothum.thodi@huawei.com> References: <20171006140450.89652-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.59D78ED4.0071, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: d42ebc258cbaf14df7ac8952d549471a Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The HiSilicon erratum 161010801 describes the limitation of HiSilicon platforms hip06/hip07 to support the SMMUv3 mappings for MSI transactions. PCIe controller on these platforms has to differentiate the MSI payload against other DMA payload and has to modify the MSI payload. This basically makes it difficult for this platforms to have a SMMU translation for MSI. In order to workaround this, ARM SMMUv3 driver requires a quirk to treat the MSI regions separately. Such a quirk is currently missing for DT based systems and therefore we need to blacklist the hip06/hip07 PCIe controllers. Signed-off-by: Shameer Kolothum --- drivers/pci/dwc/pcie-hisi.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Gabriele Paoloni Acked-by: Zhou Wang Acked-by: Bjorn Helgaas diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c index a201791..6800747 100644 --- a/drivers/pci/dwc/pcie-hisi.c +++ b/drivers/pci/dwc/pcie-hisi.c @@ -270,6 +270,12 @@ static int hisi_pcie_probe(struct platform_device *pdev) struct resource *reg; int ret; + if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) && + of_property_read_bool(dev->of_node, "iommu-map")) { + dev_warn(dev, "HiSilicon erratum 161010801: blacklisting PCIe controllers behind SMMUv3\n"); + return -ENODEV; + } + hisi_pcie = devm_kzalloc(dev, sizeof(*hisi_pcie), GFP_KERNEL); if (!hisi_pcie) return -ENOMEM; @@ -340,6 +346,12 @@ static int hisi_pcie_almost_ecam_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct pci_ecam_ops *ops; + if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) && + of_property_read_bool(dev->of_node, "iommu-map")) { + dev_warn(dev, "HiSilicon erratum 161010801: blacklisting PCIe controllers behind SMMUv3\n"); + return -ENODEV; + } + ops = (struct pci_ecam_ops *)of_device_get_match_data(dev); return pci_host_common_probe(pdev, ops); }