From patchwork Mon Jan 23 22:32:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 92277 Delivered-To: patch@linaro.org Received: by 10.182.3.34 with SMTP id 2csp1428874obz; Mon, 23 Jan 2017 14:33:39 -0800 (PST) X-Received: by 10.84.216.70 with SMTP id f6mr46700088plj.10.1485210819879; Mon, 23 Jan 2017 14:33:39 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 127si16899097pgi.128.2017.01.23.14.33.39; Mon, 23 Jan 2017 14:33:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751723AbdAWWdi (ORCPT + 7 others); Mon, 23 Jan 2017 17:33:38 -0500 Received: from foss.arm.com ([217.140.101.70]:55948 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751445AbdAWWdg (ORCPT ); Mon, 23 Jan 2017 17:33:36 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E1B914F6; Mon, 23 Jan 2017 14:32:48 -0800 (PST) Received: from beelzebub.ast.arm.com (unknown [10.118.96.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 833F43F318; Mon, 23 Jan 2017 14:32:47 -0800 (PST) From: Jeremy Linton To: linux-arm-kernel@lists.infradead.org Cc: linux-acpi@vger.kernel.org, will.deacon@arm.com, mark.rutland@arm.com, punit.agrawal@arm.com, steve.capper@arm.com, msalter@redhat.com, mlangsdorf@redhat.com, linux@armlinux.org.uk, lorenzo.pieralisi@arm.com, bamvor.zhangjian@linaro.org Subject: [PATCH v14 2/6] arm64: pmu: Cache PMU interrupt numbers from MADT parse Date: Mon, 23 Jan 2017 16:32:41 -0600 Message-Id: <1485210765-9422-3-git-send-email-jeremy.linton@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485210765-9422-1-git-send-email-jeremy.linton@arm.com> References: <1485210765-9422-1-git-send-email-jeremy.linton@arm.com> Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Mark Salter In the case of ACPI, the PMU IRQ information is contained in the MADT table. Also, since the PMU does not exist as a device in the ACPI DSDT table, it is necessary to create a platform device so that the appropriate driver probing is triggered. Since the platform device creation needs to happen after the CPU's have been started, and the MADT parsing needs to happen before, we save off the interrupt numbers discovered during the parsing. Signed-off-by: Mark Salter Signed-off-by: Jeremy Linton --- arch/arm64/kernel/smp.c | 5 +++++ drivers/perf/Kconfig | 4 ++++ drivers/perf/Makefile | 1 + drivers/perf/arm_pmu_acpi.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/perf/arm_pmu.h | 7 +++++++ 5 files changed, 53 insertions(+) create mode 100644 drivers/perf/arm_pmu_acpi.c -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index cb87234..789587d 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -551,6 +552,7 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) } bootcpu_valid = true; early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid)); + arm_pmu_parse_acpi(0, processor); return; } @@ -571,6 +573,9 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) */ acpi_set_mailbox_entry(cpu_count, processor); + /* get PMU irq info */ + arm_pmu_parse_acpi(cpu_count, processor); + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid)); cpu_count++; diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 4d5c5f9..697df05 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -19,4 +19,8 @@ config XGENE_PMU help Say y if you want to use APM X-Gene SoC performance monitors. +config ARM_PMU_ACPI + def_bool y + depends on ARM_PMU && ACPI + endmenu diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile index b116e98..d1d7762 100644 --- a/drivers/perf/Makefile +++ b/drivers/perf/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_ARM_PMU) += arm_pmu.o obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o +obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c new file mode 100644 index 0000000..becc861 --- /dev/null +++ b/drivers/perf/arm_pmu_acpi.c @@ -0,0 +1,36 @@ +/* + * ARM ACPI PMU support + * + * Copyright (C) 2015 Red Hat Inc. + * Author: Mark Salter + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + */ + +#include +#include +#include + +struct pmu_irq { + int gsi; + int trigger; + bool used; +}; + +static struct pmu_irq pmu_irqs[NR_CPUS]; + +/* + * Called from acpi_map_gic_cpu_interface()'s MADT parsing during boot. + * This routine saves off the GSI's and their trigger state for use when we are + * ready to build the PMU platform device. + */ +void __init arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic) +{ + pmu_irqs[cpu].gsi = gic->performance_interrupt; + if (gic->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) + pmu_irqs[cpu].trigger = ACPI_EDGE_SENSITIVE; + else + pmu_irqs[cpu].trigger = ACPI_LEVEL_SENSITIVE; +} diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 8462da2..df1ba55 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -164,4 +164,11 @@ int arm_pmu_device_probe(struct platform_device *pdev, #endif /* CONFIG_ARM_PMU */ +#ifdef CONFIG_ARM_PMU_ACPI +struct acpi_madt_generic_interrupt; +void arm_pmu_parse_acpi(int cpu, struct acpi_madt_generic_interrupt *gic); +#else +#define arm_pmu_parse_acpi(a, b) do { } while (0) +#endif /* CONFIG_ARM_PMU_ACPI */ + #endif /* __ARM_PMU_H__ */