From patchwork Wed Mar 11 12:39:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 45640 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f198.google.com (mail-lb0-f198.google.com [209.85.217.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E6AC7214C6 for ; Wed, 11 Mar 2015 12:42:32 +0000 (UTC) Received: by lbiz11 with SMTP id z11sf6496595lbi.2 for ; Wed, 11 Mar 2015 05:42:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=h80LO3dC0lpakPOm6yArMrKgbapPbRQMZ/1YTyA+2WY=; b=MLbsceO9yCmYS2psOZcPIl/WG0i1tDUh81IJ4cyHUXH3ORphKOZlpbMHp9jnwi8Vsk gfM+Sp0cUiHJV6KLhhlRWJMirkAtPDBKtqBQZTnRTfNVlWYiEqUDzeU2ufBwEU2uTfZU VX1WgHI8IEHaKk+oCZpkDaFCMIgiIigQ8rcnu7XawiLH8EUY7sBTnJ4tCf+EsmH8s64p S87CIP38Moxbx9lHn4ItMTCTIFO5DhCRv+tksu1mqtO+wX+B07bESGgou1j4568M1Cfy d8w/6AFV0JRPMTz6Dqch7mTzgUQueU4QlBRFOeNQs953SZro4hFWHpqsfnArEVRpOVZf pKGA== X-Gm-Message-State: ALoCoQn3fu9LVuAxItKn5qGR+QNiJHGiBFjq7BWI+OsEgii0UDT6gNOuwzMVqcWDwZyQ4O5mxXab X-Received: by 10.112.125.67 with SMTP id mo3mr3781666lbb.6.1426077751905; Wed, 11 Mar 2015 05:42:31 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.121.5 with SMTP id lg5ls125936lab.106.gmail; Wed, 11 Mar 2015 05:42:31 -0700 (PDT) X-Received: by 10.112.160.10 with SMTP id xg10mr23570960lbb.83.1426077751762; Wed, 11 Mar 2015 05:42:31 -0700 (PDT) Received: from mail-la0-f43.google.com (mail-la0-f43.google.com. [209.85.215.43]) by mx.google.com with ESMTPS id da11si2253404lad.115.2015.03.11.05.42.31 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 11 Mar 2015 05:42:31 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) client-ip=209.85.215.43; Received: by labgm9 with SMTP id gm9so8405487lab.13 for ; Wed, 11 Mar 2015 05:42:31 -0700 (PDT) X-Received: by 10.112.204.197 with SMTP id la5mr34182805lbc.29.1426077751330; Wed, 11 Mar 2015 05:42:31 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.35.133 with SMTP id h5csp2752252lbj; Wed, 11 Mar 2015 05:42:30 -0700 (PDT) X-Received: by 10.66.154.162 with SMTP id vp2mr76923108pab.73.1426077741778; Wed, 11 Mar 2015 05:42:21 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ku8si6967805pab.103.2015.03.11.05.42.20; Wed, 11 Mar 2015 05:42:21 -0700 (PDT) Received-SPF: none (google.com: linux-acpi-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753257AbbCKMmQ (ORCPT + 7 others); Wed, 11 Mar 2015 08:42:16 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:36705 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753241AbbCKMmH (ORCPT ); Wed, 11 Mar 2015 08:42:07 -0400 Received: by padfa1 with SMTP id fa1so11218640pad.3 for ; Wed, 11 Mar 2015 05:42:07 -0700 (PDT) X-Received: by 10.66.154.17 with SMTP id vk17mr76875819pab.5.1426077726891; Wed, 11 Mar 2015 05:42:06 -0700 (PDT) Received: from localhost ([180.150.153.56]) by mx.google.com with ESMTPSA id qh6sm5980738pab.34.2015.03.11.05.42.05 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 11 Mar 2015 05:42:06 -0700 (PDT) From: Hanjun Guo To: Catalin Marinas , "Rafael J. Wysocki" , Will Deacon , Olof Johansson , Grant Likely Cc: Lorenzo Pieralisi , Arnd Bergmann , Mark Rutland , Graeme Gregory , Sudeep Holla , Jon Masters , Marc Zyngier , Mark Brown , Robert Richter , Timur Tabi , Ashwin Chaugule , suravee.suthikulpanit@amd.com, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, Hanjun Guo Subject: [PATCH v10 15/21] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi Date: Wed, 11 Mar 2015 20:39:41 +0800 Message-Id: <1426077587-1561-16-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1426077587-1561-1-git-send-email-hanjun.guo@linaro.org> References: <1426077587-1561-1-git-send-email-hanjun.guo@linaro.org> Sender: linux-acpi-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: hanjun.guo@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is used, and then register device's gsi with the core IRQ subsystem. acpi_register_gsi() is similar to DT based irq_of_parse_and_map(), since gsi is unique in the system, so use hwirq number directly for the mapping. We are going to implement stacked domains when GICv2m, GICv3, ITS support are added. CC: Marc Zyngier Originally-by: Amit Daniel Kachhap Tested-by: Suravee Suthikulpanit Tested-by: Yijing Wang Tested-by: Mark Langsdorf Tested-by: Jon Masters Tested-by: Timur Tabi Tested-by: Robert Richter Acked-by: Robert Richter Acked-by: Rafael J. Wysocki Reviewed-by: Grant Likely Signed-off-by: Hanjun Guo --- arch/arm64/kernel/acpi.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/acpi/bus.c | 3 ++ include/linux/acpi.h | 1 + 3 files changed, 77 insertions(+) diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index c9203c0..dec6f8a 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -76,6 +76,12 @@ static int __init dt_scan_depth1_nodes(unsigned long node, } /* + * Since we're on ARM, the default interrupt routing model + * clearly has to be GIC. + */ +enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC; + +/* * __acpi_map_table() will be called before page_init(), so early_ioremap() * or early_memremap() should be called here to for ACPI table mapping. */ @@ -218,6 +224,73 @@ void __init acpi_init_cpus(void) pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus); } +int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) +{ + *irq = irq_find_mapping(NULL, gsi); + + return 0; +} +EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); + +/* + * success: return IRQ number (>0) + * failure: return =< 0 + */ +int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) +{ + unsigned int irq; + unsigned int irq_type; + + /* + * ACPI have no bindings to indicate SPI or PPI, so we + * use different mappings from DT in ACPI. + * + * For FDT + * PPI interrupt: in the range [0, 15]; + * SPI interrupt: in the range [0, 987]; + * + * For ACPI, GSI should be unique so using + * the hwirq directly for the mapping: + * PPI interrupt: in the range [16, 31]; + * SPI interrupt: in the range [32, 1019]; + */ + + if (trigger == ACPI_EDGE_SENSITIVE && + polarity == ACPI_ACTIVE_LOW) + irq_type = IRQ_TYPE_EDGE_FALLING; + else if (trigger == ACPI_EDGE_SENSITIVE && + polarity == ACPI_ACTIVE_HIGH) + irq_type = IRQ_TYPE_EDGE_RISING; + else if (trigger == ACPI_LEVEL_SENSITIVE && + polarity == ACPI_ACTIVE_LOW) + irq_type = IRQ_TYPE_LEVEL_LOW; + else if (trigger == ACPI_LEVEL_SENSITIVE && + polarity == ACPI_ACTIVE_HIGH) + irq_type = IRQ_TYPE_LEVEL_HIGH; + else + irq_type = IRQ_TYPE_NONE; + + /* + * Since only one GIC is supported in ACPI 5.0, we can + * create mapping refer to the default domain + */ + irq = irq_create_mapping(NULL, gsi); + if (!irq) + return irq; + + /* Set irq type if specified and different than the current one */ + if (irq_type != IRQ_TYPE_NONE && + irq_type != irq_get_trigger_type(irq)) + irq_set_irq_type(irq, irq_type); + return irq; +} +EXPORT_SYMBOL_GPL(acpi_register_gsi); + +void acpi_unregister_gsi(u32 gsi) +{ +} +EXPORT_SYMBOL_GPL(acpi_unregister_gsi); + static int __init acpi_parse_fadt(struct acpi_table_header *table) { struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table; diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 8b67bd0..c412fdb 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -448,6 +448,9 @@ static int __init acpi_bus_init_irq(void) case ACPI_IRQ_MODEL_IOSAPIC: message = "IOSAPIC"; break; + case ACPI_IRQ_MODEL_GIC: + message = "GIC"; + break; case ACPI_IRQ_MODEL_PLATFORM: message = "platform specific model"; break; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 6ec33c5..de4e86f 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -73,6 +73,7 @@ enum acpi_irq_model_id { ACPI_IRQ_MODEL_IOAPIC, ACPI_IRQ_MODEL_IOSAPIC, ACPI_IRQ_MODEL_PLATFORM, + ACPI_IRQ_MODEL_GIC, ACPI_IRQ_MODEL_COUNT };