Message ID | 20250206131428.3261578-1-zhenglifeng1@huawei.com |
---|---|
Headers | show |
Series | Support for autonomous selection in cppc_cpufreq | expand |
On 2025/2/6 21:14, Lifeng Zheng wrote: > Add sysfs interfaces for CPPC autonomous selection in the cppc_cpufreq > driver. > > The patch series is organized in two parts: > > - patch 1-5 refactor out the general CPPC register get and set functions > in cppc_acpi.c > > - patches 6-8 expose sysfs files for users to control CPPC autonomous > selection when supported > > Changelog: > > v5: > > - add more explanation to the commit logs and comments > - change REG_OPTIONAL from bin to hex > - split patch 2 into 3 smaller patches > - remove CPPC_REG_VAL_READ() and CPPC_REG_VAL_WRITE() macros > - move the modification part in patch 5 into a separate patch > - rename the sysfs file from "energy_perf" to > energy_performance_preference_val > > v4: > > - add REG_OPTIONAL and IS_OPTIONAL_CPC_REG to judge if a cpc register is > an optional one > - check whether the register is optional before CPC_SUPPORTED check in > cppc_get_reg_val() and cppc_set_reg_val() > - check the register's type in cppc_set_reg_val() > - add macros to generally implement registers getting and setting > functions > - move some logic codes from cppc_cpufreq.c to cppc_acpi.c > - replace cppc_get_auto_sel_caps() by cppc_get_auto_sel() > > v3: > > - change cppc_get_reg() and cppc_set_reg() name to cppc_get_reg_val() and > cppc_set_reg_val() > - extract cppc_get_reg_val_in_pcc() and cppc_set_reg_val_in_pcc() > - return the result of cpc_read() in cppc_get_reg_val() > - add pr_debug() in cppc_get_reg_val_in_pcc() when pcc_ss_id < 0 > - rename 'cpunum' to 'cpu' in cppc_get_reg_val() > - move some macros from drivers/cpufreq/cppc_cpufreq.c to > include/acpi/cppc_acpi.h with a CPPC_XXX prefix > > v2: > > - fix some incorrect placeholder > - change kstrtoul to kstrtobool in store_auto_select > > Lifeng Zheng (8): > ACPI: CPPC: Add IS_OPTIONAL_CPC_REG macro to judge if a cpc_reg is > optional > ACPI: CPPC: Optimize cppc_get_perf() > ACPI: CPPC: Rename cppc_get_perf() to cppc_get_reg_val() > ACPI: CPPC: Add cppc_set_reg_val() > ACPI: CPPC: Refactor register value get and set ABIs > ACPI: CPPC: Modify cppc_get_auto_sel_caps() to cppc_get_auto_sel() > ACPI: CPPC: Add three functions related to autonomous selection > cpufreq: CPPC: Support for autonomous selection in cppc_cpufreq > > .../ABI/testing/sysfs-devices-system-cpu | 54 ++++ > drivers/acpi/cppc_acpi.c | 303 +++++++++++------- > drivers/cpufreq/amd-pstate.c | 3 +- > drivers/cpufreq/cppc_cpufreq.c | 109 +++++++ > include/acpi/cppc_acpi.h | 30 +- > 5 files changed, 372 insertions(+), 127 deletions(-) > Gentle ping. Attach discussions of previous versions: v1: https://lore.kernel.org/all/20241114084816.1128647-1-zhenglifeng1@huawei.com/ v2: https://lore.kernel.org/all/20241122062051.3658577-1-zhenglifeng1@huawei.com/ v3: https://lore.kernel.org/all/20241216091603.1247644-1-zhenglifeng1@huawei.com/ v4: https://lore.kernel.org/all/20250113122104.3870673-1-zhenglifeng1@huawei.com/
On Thu, Feb 13, 2025 at 2:55 AM zhenglifeng (A) <zhenglifeng1@huawei.com> wrote: > > On 2025/2/6 21:14, Lifeng Zheng wrote: > > Add sysfs interfaces for CPPC autonomous selection in the cppc_cpufreq > > driver. > > > > The patch series is organized in two parts: > > > > - patch 1-5 refactor out the general CPPC register get and set functions > > in cppc_acpi.c > > > > - patches 6-8 expose sysfs files for users to control CPPC autonomous > > selection when supported > > > > Changelog: > > > > v5: > > > > - add more explanation to the commit logs and comments > > - change REG_OPTIONAL from bin to hex > > - split patch 2 into 3 smaller patches > > - remove CPPC_REG_VAL_READ() and CPPC_REG_VAL_WRITE() macros > > - move the modification part in patch 5 into a separate patch > > - rename the sysfs file from "energy_perf" to > > energy_performance_preference_val > > > > v4: > > > > - add REG_OPTIONAL and IS_OPTIONAL_CPC_REG to judge if a cpc register is > > an optional one > > - check whether the register is optional before CPC_SUPPORTED check in > > cppc_get_reg_val() and cppc_set_reg_val() > > - check the register's type in cppc_set_reg_val() > > - add macros to generally implement registers getting and setting > > functions > > - move some logic codes from cppc_cpufreq.c to cppc_acpi.c > > - replace cppc_get_auto_sel_caps() by cppc_get_auto_sel() > > > > v3: > > > > - change cppc_get_reg() and cppc_set_reg() name to cppc_get_reg_val() and > > cppc_set_reg_val() > > - extract cppc_get_reg_val_in_pcc() and cppc_set_reg_val_in_pcc() > > - return the result of cpc_read() in cppc_get_reg_val() > > - add pr_debug() in cppc_get_reg_val_in_pcc() when pcc_ss_id < 0 > > - rename 'cpunum' to 'cpu' in cppc_get_reg_val() > > - move some macros from drivers/cpufreq/cppc_cpufreq.c to > > include/acpi/cppc_acpi.h with a CPPC_XXX prefix > > > > v2: > > > > - fix some incorrect placeholder > > - change kstrtoul to kstrtobool in store_auto_select > > > > Lifeng Zheng (8): > > ACPI: CPPC: Add IS_OPTIONAL_CPC_REG macro to judge if a cpc_reg is > > optional > > ACPI: CPPC: Optimize cppc_get_perf() > > ACPI: CPPC: Rename cppc_get_perf() to cppc_get_reg_val() > > ACPI: CPPC: Add cppc_set_reg_val() > > ACPI: CPPC: Refactor register value get and set ABIs > > ACPI: CPPC: Modify cppc_get_auto_sel_caps() to cppc_get_auto_sel() > > ACPI: CPPC: Add three functions related to autonomous selection > > cpufreq: CPPC: Support for autonomous selection in cppc_cpufreq > > > > .../ABI/testing/sysfs-devices-system-cpu | 54 ++++ > > drivers/acpi/cppc_acpi.c | 303 +++++++++++------- > > drivers/cpufreq/amd-pstate.c | 3 +- > > drivers/cpufreq/cppc_cpufreq.c | 109 +++++++ > > include/acpi/cppc_acpi.h | 30 +- > > 5 files changed, 372 insertions(+), 127 deletions(-) > > > > Gentle ping. OK, so I'm wondering how this is related to the patch series at https://lore.kernel.org/linux-acpi/20250211103737.447704-1-sumitg@nvidia.com/ > Attach discussions of previous versions: > v1: https://lore.kernel.org/all/20241114084816.1128647-1-zhenglifeng1@huawei.com/ > v2: https://lore.kernel.org/all/20241122062051.3658577-1-zhenglifeng1@huawei.com/ > v3: https://lore.kernel.org/all/20241216091603.1247644-1-zhenglifeng1@huawei.com/ > v4: https://lore.kernel.org/all/20250113122104.3870673-1-zhenglifeng1@huawei.com/ >