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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN3PEPF0000B071.mail.protection.outlook.com (10.167.243.116) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Tue, 22 Oct 2024 03:46:26 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 21 Oct 2024 22:46:25 -0500 From: Mario Limonciello To: Borislav Petkov CC: Thomas Gleixner , Ingo Molnar , "Dave Hansen" , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H . Peter Anvin" , "Rafael J . Wysocki" , "Gautham R . Shenoy" , Mario Limonciello , Perry Yuan , Brijesh Singh , Peter Zijlstra , Li RongQing , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "open list:ACPI" , "open list:AMD PSTATE DRIVER" , Pawan Gupta Subject: [PATCH v2 0/5] x86 Heterogeneous design identification Date: Mon, 21 Oct 2024 22:46:03 -0500 Message-ID: <20241022034608.32396-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B071:EE_|IA0PR12MB7578:EE_ X-MS-Office365-Filtering-Correlation-Id: 347824ec-0c25-4679-985c-08dcf24c1b26 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|82310400026|1800799024|7416014|376014; X-Microsoft-Antispam-Message-Info: De6FUeMpuei52HIL/pQSgP/KxKN/hTytbdVJpejbn4d02T6jZhCO6l1xf9C6Q7fAIpWls3YpvVEjyiROFEupDoK0aB5VcN0YfcJmQeQUmTI/qkWjiiUoUeZIvkCnHG7SvRgNSo5qsciV34mRJQylLLpB3MQlmNWXDns8k+AD9QrHZYiH7PpAsryUBaIoMiYvbtqJ56icvZl5kSprYy0Dd6CRDARXmQUf4+6T0Hb3pH7e+01iWsj34BcRtS87UbCXudHaMVP/sxIwxiqSMWLxc+SuEeusCRKjcTWOYwalJ6WX95tJcAyOAa6uAKy1jDduZ7BqM2N/Jw2IjICZUOpzdZ7YR04LqVFqM07r0yo68wY2bbkkDJZLfaC4yT8kvCc0zGrSTplYlEuH/rlFUj9Ykcn0MUEx9m8LRlo2xbWQtQpm41QxslbHSNSRmzLURbsmxgFvOtxsxkH95T4Vu2CACdhxqESENADul9g4Y0OGME655cZXyozKG9l1pKuWQIM3MeljB8k2DMS9rB++6U7N394xxNdbeV1DwcwCtciQH0/Z/2KNAdYRHW+hsRWj+abPwxnXY/7MUVqkvlLxp9ih24nIags/8kplhrgr5JNMm4lnDph+FhjlspqOaRLQh0i5TJCqSMJHw0zoa+mNg+p+OlaE8k39hHuVV92EreXHScSrAF0bS/flymaE5wQyNhqfQ28/9XN2FIOYCGG7vyS5CrrUN8M8ZUm9ybBgAIBk2iGdCA2UCqoivYNCtNYyTskn/tnctpuwQKe+dCpQjdcUUims3rwkq1kZ7HayHbbjfKvFyjIM2EGLWu/udGGXBKwkKQ5faaI44k5XcRgim0CXv/3eND1dZpw+R+46fe2Uitgx1a+tcXZJDxI2FOPTKDzfcgyUZubGEl5YGo1YWtWW9BEeEyGUUaIt1ToNjR1kCm6/hVGXjDYYC/zrltArNPpyBms41QFXyYmya8P6FmrAfwa/vTYmNMxyI5nuOMJkljacPlQxmTMRAZ+bBI/wtHZJq1RNczzbHjosOj1N3ky8yRtJjUh1SY+27x0QSWw2ELdnhXCgqAQjs7LUhS1FxMtofP5BXToxVTSC/tsppGiZ0QVu1pDnGeHq3ZwajBxCH2R1gDBZrKTQXSgFD5jYA4o3B3deYcfI4R0DFynEMywtFkfsQoq+TVdXBg3NF6lncIbET7HdGT9YkxjKK/uuZmQvcAYDy1BRYpG4SEBqmLcQTrGrbegdl4g2pun0Wxti5SPjzjgogW2NJSEkV3rQf6XLKNS77TcYHPFXWq8LfrA8ixD8/o8a4P8NGCQExgqaxD8tPKPCUCK/zHo2KJzJuWCZOQNwg8hAVeYpo1fhaSd9vZjeUADG9UomzdRDtT2u0NQx4wOlde7Gd+37ZMgzLC4bIjdHuANeY6c7Z9z6NVWGxREbryXMJRbZzXnJsGJHcLg= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(7416014)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2024 03:46:26.6093 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 347824ec-0c25-4679-985c-08dcf24c1b26 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B071.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7578 This series adds topology identification for Intel and AMD processors and uses this identification in the AMD CPPC code to identify the boost numerator. This series was previously submitted as [1], but this was based on some patches in linux-pm/linux-next that will be dropped. Instead the series is now based on tip/master. This also pulls one patch from Pawan's series [2] and adjusts it for all feedback while adding AMD support at the same time. [1] https://lore.kernel.org/all/20241021175509.2079-5-mario.limonciello@amd.com/T/ [2] https://lore.kernel.org/all/20240930-add-cpu-type-v4-0-104892b7ab5f@linux.intel.com/ Mario Limonciello (2): x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix x86/amd: Use heterogeneous core topology for identifying boost numerator Pawan Gupta (1): x86/cpu: Add CPU type to struct cpuinfo_topology Perry Yuan (2): x86/cpufeatures: Add feature bits for AMD heterogeneous processor x86/cpu: Enable SD_ASYM_PACKING for PKG Domain on AMD Processors arch/x86/include/asm/cpu.h | 19 +++++++++++++++++++ arch/x86/include/asm/cpufeatures.h | 3 ++- arch/x86/include/asm/processor.h | 18 ++++++++++++++++++ arch/x86/include/asm/topology.h | 8 ++++++++ arch/x86/kernel/acpi/cppc.c | 23 +++++++++++++++++++++++ arch/x86/kernel/cpu/amd.c | 14 ++++++++++++++ arch/x86/kernel/cpu/debugfs.c | 1 + arch/x86/kernel/cpu/intel.c | 18 ++++++++++++++++++ arch/x86/kernel/cpu/scattered.c | 3 ++- arch/x86/kernel/cpu/topology_amd.c | 3 +++ arch/x86/kernel/cpu/topology_common.c | 13 +++++++++++++ arch/x86/kernel/smpboot.c | 5 +++-- drivers/cpufreq/amd-pstate.c | 2 +- tools/arch/x86/include/asm/cpufeatures.h | 2 +- 14 files changed, 126 insertions(+), 6 deletions(-) base-commit: 21f0d4005e7eb71b95cf6b55041fd525bdb11c1f