| Message ID | 20241003213759.3038862-1-superm1@kernel.org |
|---|---|
| Headers | show |
| Series | Detect max performance values for heterogeneous AMD designs | expand |
On Thu, Oct 03, 2024 at 04:37:58PM -0500, Mario Limonciello wrote: > From: Perry Yuan <perry.yuan@amd.com> > > CPUID leaf 0x80000026 advertises core types with different efficiency > rankings. > > Bit 30 indicates the heterogeneous core topology feature, if the bit > set, it means not all instances at the current hierarchical level have > the same core topology. > > This is described in the AMD64 Architecture Programmers Manual Volume > 2 and 3, doc ID #25493 and #25494. > > Signed-off-by: Perry Yuan <perry.yuan@amd.com> > Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/kernel/cpu/scattered.c | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index dd4682857c12..cea1ed82aeb4 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -473,6 +473,7 @@ > #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ > #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ > #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ > +#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ > > /* > * BUG word(s) > diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c > index c84c30188fdf..3bba55323163 100644 > --- a/arch/x86/kernel/cpu/scattered.c > +++ b/arch/x86/kernel/cpu/scattered.c > @@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, > { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, > + { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 }, > { 0, 0, 0, 0, 0 } > }; > > -- > 2.43.0 >
From: Mario Limonciello <mario.limonciello@amd.com> AMD heterogeneous designs such as the Ryzen AI 300 series processors have multiple core types that can reach different maximum clock values. This series uses the CPUID Fn_0x80000026 to detect such designs and to correct configure the boost numerator that is used to calculate maximum frequency. Mario Limonciello (1): CPPC: Use heterogeneous core topology for identifying boost numerator Perry Yuan (1): x86/cpufeatures: Add feature bits for AMD heterogeneous processor arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/processor.h | 13 +++++++++++++ arch/x86/kernel/acpi/cppc.c | 30 ++++++++++++++++++++++++++++++ arch/x86/kernel/cpu/amd.c | 29 +++++++++++++++++++++++++++++ arch/x86/kernel/cpu/scattered.c | 1 + 5 files changed, 74 insertions(+)