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[v15,0/4] cxl, EINJ: Update EINJ for CXL error types

Message ID 20240311142508.31717-1-Benjamin.Cheatham@amd.com
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Series cxl, EINJ: Update EINJ for CXL error types | expand

Message

Ben Cheatham March 11, 2024, 2:25 p.m. UTC 
v15 Changes:
	- Update commit messages for patches 2/4 & 3/4 (Tony)
	- Add line to cover letter about CXL 2.0+ errors being available
	  under legacy EINJ interface
	- Add einj_cxl_rch_error_inject() for CXL 1.0/1.1 error injections
	  in einj-core.c
	- Remove checks for einj_initialized in einj_cxl_*_inject functions
	  in einj-cxl.c (Dan)
	- Update commit message for patch 1/4 from recommending checking
	  einj_is_initialized() to a more generic "safegaurd against EINJ
	  not being initialized"
	- Use more specific headers in einj-cxl.c and einj-cxl.h (Jonathan)
	- Use ACPI_APEI_EINJ_CXL_* defines in place of BIT() macros in
	  einj_cxl_error_type_string struct (Jonathan)
	- Move error_type_get() above einj_validate_error_type() to cleanup
	  diff (Jonathan)

v14 Changes:
	- Remove einj-cxl module and instead compile as part of EINJ module
	  (Dan)
	- Change CONFIG_ACPI_APEI_EINJ_CXL from tristate to bool (Dan)
	- Fix CONFIG_ACPI_APEI_EINJ_CXL/CONFIG_CXL_BUS dependencies
	- Remove EINJ function exports (Dan)
	- Organizational changes for CXL content in EINJ kernel
	  documentation (Dan)
	- Demote "EINJ table not found." print to pr_debug() from pr_info()
	  (Dan)

The new CXL error types will use the Memory Address field in the
SET_ERROR_TYPE_WITH_ADDRESS structure in order to target a CXL 1.1
compliant memory-mapped downstream port. The value of the memory address
will be in the port's MMIO range, and it will not represent physical
(normal or persistent) memory.

Add the functionality for injecting CXL 1.1/2.0+ errors to the EINJ module,
but not through the EINJ legacy interface under /sys/kernel/debug/apei/einj.
Instead, make the error types available under /sys/kernel/debug/cxl.
This allows for validating the MMIO address for a CXL 1.1 error type
while also not making the user responsible for finding it. CXL 2.0+
error types will be available through the legacy EINJ interface and
under the new debug/cxl interface since they target the SBDF of the CXL
downstream port instead of a MMIO address.

Ben Cheatham (4):
  EINJ: Migrate to a platform driver
  EINJ: Add CXL error type support
  cxl/core: Add CXL EINJ debugfs files
  EINJ, Documentation: Update EINJ kernel doc

 Documentation/ABI/testing/debugfs-cxl         |  30 +++++
 .../firmware-guide/acpi/apei/einj.rst         |  34 +++++
 MAINTAINERS                                   |   1 +
 drivers/acpi/apei/Kconfig                     |  12 ++
 drivers/acpi/apei/Makefile                    |   2 +
 drivers/acpi/apei/apei-internal.h             |  18 +++
 drivers/acpi/apei/{einj.c => einj-core.c}     | 123 +++++++++++++++---
 drivers/acpi/apei/einj-cxl.c                  | 116 +++++++++++++++++
 drivers/cxl/core/port.c                       |  42 ++++++
 include/linux/einj-cxl.h                      |  44 +++++++
 10 files changed, 401 insertions(+), 21 deletions(-)
 rename drivers/acpi/apei/{einj.c => einj-core.c} (90%)
 create mode 100644 drivers/acpi/apei/einj-cxl.c
 create mode 100644 include/linux/einj-cxl.h