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[v2,-next,0/4] RISC-V: ACPI improvements

Message ID 20230927170015.295232-1-sunilvl@ventanamicro.com
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Series RISC-V: ACPI improvements | expand

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Sunil V L Sept. 27, 2023, 5 p.m. UTC
This series is a set of patches which were originally part of RFC v1 series
[1] to add ACPI support in RISC-V interrupt controllers. Since these
patches are independent of the interrupt controllers, creating this new
series which helps to merge instead of waiting for big series.

This set of patches primarily adds support below ECR [2] which is approved
by the ASWG and adds below features.

- Get CBO block sizes from RHCT on ACPI based systems.
- Set timer_can_not_wakeup in timer driver based on the flag in RHCT.

Additionally, the series contains a patch to improve acpi_os_ioremap().

[1] - https://lore.kernel.org/lkml/20230803175202.3173957-1-sunilvl@ventanamicro.com/
[2] - https://drive.google.com/file/d/1sKbOa8m1UZw1JkquZYe3F1zQBN1xXsaf/view?usp=sharing

Changes since RFC v1:
	1) Separated the patches from interrupt controller support series.
	2) Addressed feedback from Andy and Drew.
	3) Rebased to Palmer's for-next tree.
	4) Added RB tags received on RFC v1.

Sunil V L (4):
  RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping
  RISC-V: ACPI: RHCT: Add function to get CBO block sizes
  RISC-V: cacheflush: Initialize CBO variables on ACPI systems
  clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu

 arch/riscv/Kconfig                |  1 +
 arch/riscv/include/asm/acpi.h     |  9 ++++
 arch/riscv/kernel/acpi.c          | 87 ++++++++++++++++++++++++++++++-
 arch/riscv/mm/cacheflush.c        | 37 ++++++++++---
 drivers/acpi/riscv/rhct.c         | 72 ++++++++++++++++++++++++-
 drivers/clocksource/timer-riscv.c |  4 ++
 6 files changed, 201 insertions(+), 9 deletions(-)