From patchwork Thu Aug 19 21:56:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 499772 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp933558jab; Thu, 19 Aug 2021 14:57:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmN3nJrfBoW94h6grBfMNvIAq803HNR163U7hRtBbVFXY6F1A2kzHUC4BDu2luzG2Ne3FL X-Received: by 2002:a02:2243:: with SMTP id o64mr14951288jao.40.1629410237768; Thu, 19 Aug 2021 14:57:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629410237; cv=none; d=google.com; s=arc-20160816; b=eH3UVuVX0PuIyl9o0OLP+T8oWgzvpIcFyuGleW6lwUDUSps1qTZ0sCfOTve8UXugPN N9GL8voGeLgNzOxdGc8dNYncPW9PDx59aWD6YU3f/ZlyCnjJV2qz+wl1gOMC0C+qk1Vi ribJ56Xb2lajxR+CwpfgQpf3sTYz+zZqZgWzhgDj5IgDdWOGnpnTp3k6U7CRQVt2rNiV B0uZQa0gmQBuI9WnDJs3bbfPjVm9Xk1MCOnxdzQUsCloph86KxCN8ImWp/zlwgaagJqL /RwQrmda4WxkfIGbYYF2ymkD1fsun/wXrBZ7icHA2Bw4U5lRW83jKCTYsAbOAIHBgpcV OCJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=Gvg9zWX1AuRmdMFWAHSXQC781OLGIdrmRQe5gGVOLgo=; b=Udz2VdvMuZcsxagvZQONSHQ6Cho912f3PWmEP5BiTaFZTzY1bK9CI8ACmGeUAdSXfe RmBNG8qYjyfPGMH2nv5ZQMpLDmPVVlJQopruuDe8+Q0CK3btZxTonTeuOya6ZqXB4ZKv ti7NBqQI9vH4QU+QthRAiUKTYkW5DbzGakKfaCu/EE86JRUV1YBaviQMYKY+l/2ictXQ mY2wz+6oKUayf1uuJZNiMqgiLSymyndFR3Q4wF6ajHBuuZuWVXRB/LcphQRiYVMsLkFj puwUft/ZH7+yP7D07Leeupv9lF+vWHH+TQTWMAqgwqsMrrCzmoAxj4fgH5eAAQcKUEmE mZPA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g8si4575844ilc.70.2021.08.19.14.57.17; Thu, 19 Aug 2021 14:57:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233612AbhHSV5x (ORCPT + 3 others); Thu, 19 Aug 2021 17:57:53 -0400 Received: from foss.arm.com ([217.140.110.172]:47484 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229605AbhHSV5x (ORCPT ); Thu, 19 Aug 2021 17:57:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0EC751042; Thu, 19 Aug 2021 14:57:16 -0700 (PDT) Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 74E593F40C; Thu, 19 Aug 2021 14:57:15 -0700 (PDT) From: Jeremy Linton To: linux-pci@vger.kernel.org Cc: lorenzo.pieralisi@arm.com, nsaenz@kernel.org, bhelgaas@google.com, rjw@rjwysocki.net, lenb@kernel.org, robh@kernel.org, kw@linux.com, f.fainelli@gmail.com, sdonthineni@nvidia.com, stefan.wahren@i2se.com, bcm-kernel-feedback-list@broadcom.com, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jeremy Linton Subject: [PATCH v2 0/4] CM4 ACPI PCIe quirk Date: Thu, 19 Aug 2021 16:56:51 -0500 Message-Id: <20210819215655.84866-1-jeremy.linton@arm.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The PFTF CM4 is an ACPI platform that is following the Arm PCIe SMC (DEN0115) standard because its PCIe config space isn't ECAM compliant since it is split into two parts. One part describes the root port registers, and another contains a moveable window pointing at a given device's 4K config space. Thus it doesn't have an MCFG table. As Linux doesn't support the PCI/SMC, a host bridge specific _DSD is added and associated with custom ECAM ops and cfgres. The custom cfg op selects between those two regions, as well as disallowing problematic accesses. V1->V2: Only move register definitions to new .h file, add include guards. Change quirk namespace identifier. Update Maintainers file. A number of whitespace, grammar, etc fixes. Jeremy Linton (4): PCI: brcmstb: Break register definitions into separate header PCI: brcmstb: Add ACPI config space quirk PCI/ACPI: Add Broadcom bcm2711 MCFG quirk MAINTAINERS: Widen brcmstb PCIe file scope MAINTAINERS | 2 +- drivers/acpi/pci_mcfg.c | 13 ++ drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-brcmstb-acpi.c | 74 ++++++++++ drivers/pci/controller/pcie-brcmstb.c | 150 +------------------- drivers/pci/controller/pcie-brcmstb.h | 155 +++++++++++++++++++++ include/linux/pci-ecam.h | 1 + 7 files changed, 247 insertions(+), 149 deletions(-) create mode 100644 drivers/pci/controller/pcie-brcmstb-acpi.c create mode 100644 drivers/pci/controller/pcie-brcmstb.h -- 2.31.1 Acked-by: Bjorn Helgaas