From patchwork Tue Mar 26 15:17:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 161224 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp5345176jan; Tue, 26 Mar 2019 08:20:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqw8h8iGQWaDtlrgI58S7sktRrz8tBiciDNqKGKiX3OUcPV6+Sen0PLBVDvakOEHVhrNCqHv X-Received: by 2002:a17:902:822:: with SMTP id 31mr31829935plk.290.1553613603455; Tue, 26 Mar 2019 08:20:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553613603; cv=none; d=google.com; s=arc-20160816; b=ALVRX7ubPK5OQHkiokEJuSjmABGyuy2MIVQxGz/MDYEiCgT3n3LPIsXIlbbDYj8QIs 0Lp/IYDjfvXZZvbfHcWtXBsIsbJj5YmtmztZZOOE3TeSJu9o8h5i0nFf98+8EpnpALCD RWCdz/qozO9I7NuUJGCgzGS5wgHamSEl27lIKUYfr8hisElEY/H2aRpi9WgGsi79vTAD akBjqOG8W5C9BDJwF1fN2ZmIJJr6oyPkWUvc1DxaC6ydcewKqZzUjfnpkvuSnDl4qKxP VD65gq9CZ5sPYRbvuGFi199UhHWzktl05c8SnHrTBpGo49fBsTi9zfFVtVthSurNvTf7 P2+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=2zqg1Uyf5oAWzcpZY3VtBO2DqrAcrM5PNop4YwxWSYc=; b=S76QL2bznA8D7oqr4wQSYg4rlwI6GpRtZytta5i8Y59pPM2LA5fTn9aikFRqTGVtrq oApwZ0WMtYEtT7NgWnFCs4soLaUIKbxTDJDb+owXx9KwGI0t5YlQCmDwea2lt3tuRBkH MshXWcwEpfewtLtAz/0Y9ZdUL4TSwxGdRaAaZzXJFIewfbNllHKJe8hAnMnL8/TpsJLZ 72/L9LS6KMY5Cne7qqXDF4X4RGeacT0I5elOIpmbrvNDkfrklDsOzLsz5P1DAy+X8emd WjKaiMvvuutK6FdcXQvVcVkqXG78a67tVQ0jZx6NfZe4BpWLck0bGWstY7Dwu2+7pFZx WsHw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d34si17180333pla.89.2019.03.26.08.20.03; Tue, 26 Mar 2019 08:20:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726277AbfCZPUC (ORCPT + 9 others); Tue, 26 Mar 2019 11:20:02 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:5191 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726266AbfCZPUC (ORCPT ); Tue, 26 Mar 2019 11:20:02 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 53E0E781758513CD8426; Tue, 26 Mar 2019 23:19:57 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.408.0; Tue, 26 Mar 2019 23:19:50 +0800 From: Shameer Kolothum To: , CC: , , , , , , , , , , , , , Subject: [PATCH v7 0/4] arm64 SMMUv3 PMU driver with IORT support Date: Tue, 26 Mar 2019 15:17:49 +0000 Message-ID: <20190326151753.19384-1-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org This adds a driver for the SMMUv3 PMU into the perf framework. It includes an IORT update to support PM Counter Groups. This is based on the initial work done by Neil Leeder[1] SMMUv3 PMCG devices are named as smmuv3_pmcg_ where is the physical page address of the SMMU PMCG. For example, the PMCG at 0xff88840000 is named smmuv3_pmcg_ff88840 Usage example: For common arch supported events: perf stat -e smmuv3_pmcg_ff88840/transaction,filter_enable=1, filter_span=1,filter_stream_id=0x42/ -a netperf For IMP DEF events: perf stat -e smmuv3_pmcg_ff88840/event=id/ -a netperf This is sanity tested on a HiSilicon platform that requires a quirk to run it properly. As per HiSilicon erratum #162001800, PMCG event counter registers (SMMU_PMCG_EVCNTRn) on HiSilicon Hip08 platforms are read only and this prevents the software from setting the initial period on event start. Unfortunately we were a bit late in the cycle to detect this issue and now require software workaround for this. Patch #4 is added to this series to provide a workaround for this issue. Further testing on supported platforms are very much welcome. v6 --> v7 -Addressed comments from Robin and Lorenzo. -Added R-by from Robin/Hanjun and A-by from Lorenzo. v5 ---> v6 -Addressed comments from Robin and Andrew. -Changed the way global filter settings are applied as a probable fix to the v5 bug where in-use settings gets overwritten. -Use of PMCG model number to identify the platform. -Added R-by from Robin to patches #1 and #3. v4 ---> v5 -IORT code is modified to pass the option/quirk flags to the driver through platform_data (patch #4), based on Robin's comments. -Removed COMPILE_TEST (patch #2). v3 --> v4 -Addressed comments from Jean and Robin. -Merged dma config callbacks as per Lorenzo's comments(patch #1). -Added handling of Global(Counter0) filter settings mode(patch #2). -Added patch #4 to address HiSilicon erratum #162001800 - v2 --> v3 -Addressed comments from Robin. -Removed iort helper function to retrieve the PMCG reference smmu. -PMCG devices are now named using the base address v1 --> v2 - Addressed comments from Robin. - Added an helper to retrieve the associated smmu dev and named PMUs to make the association visible to user. - Added MSI support for overflow irq [1]https://www.spinics.net/lists/arm-kernel/msg598591.html Neil Leeder (2): ACPI/IORT: Add support for PMCG perf/smmuv3: Add arm64 smmuv3 pmu driver Shameer Kolothum (2): perf/smmuv3: Add MSI irq support perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk drivers/acpi/arm64/iort.c | 131 +++++-- drivers/perf/Kconfig | 9 + drivers/perf/Makefile | 1 + drivers/perf/arm_smmuv3_pmu.c | 868 ++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi_iort.h | 8 + 5 files changed, 993 insertions(+), 24 deletions(-) create mode 100644 drivers/perf/arm_smmuv3_pmu.c -- 2.7.4 Acked-by: Lorenzo Pieralisi