From patchwork Thu Sep 14 18:49:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 112625 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp1107146qgf; Thu, 14 Sep 2017 11:49:24 -0700 (PDT) X-Google-Smtp-Source: ADKCNb6WjJKouqHrXOW3FLlCnaTnjtUp4duOlR+T6+Ajd8DHAQ0gpdv/Qc5HIyx/jbHM3wHSKuUV X-Received: by 10.84.215.205 with SMTP id g13mr24964331plj.165.1505414964161; Thu, 14 Sep 2017 11:49:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505414964; cv=none; d=google.com; s=arc-20160816; b=TzBAip0CNl5qyNj5k3k1cOvWH8w6Mh8PFYi7pRaMgK05I62ru2trirzHGLpbtmOpeL QNzJcqxHUHJlthMcvqOPjci8u3xPCErsNO/dTx3GYSdknR3SOsom+fZaSEYBunVFVjm6 xvX4L43P6Ad0JgJJOsFxZ3ASNuWH2eQmjces/R7HrZxSw0SKIBil26fIBLbLfn9PXscK 9B8vv4xctBzHlk280zLNZccSm8fFhNXXMv7Ggm0trIl1/u2ki+mXZU//gB5igHxZgA81 iGA2lNQtF1s1LlU5ql5bVJLajtQzbuJ9eSTvASdPmbElpsO2bUjwHj0PtHZwbwg3tg/A 9gbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=obt0OYdAgpslzjPbUtJhcPA5EGRJGr9Jz5yFAy9Yfg8=; b=xGZKzEaPUadC82YeY0EoLhMfHbrP3vTQS4KkHtfsxWE2pD2eUrEjav7n3xhHgWXIQ6 yJ1XF1LNb0kMOUsnKKBX7VMYlzCJNUdwU9slZ/3I6tKgFMFBKXoNd5mPgi56XhJTwky9 z2ZEHoo7753aQPghHTQWuo4eiUsoBjiSPFoJYD0vDQaRc16OSMWBDAGfs8htV0LoFgO5 2aCoh/Wonuhj4nb0dhGvinDdjgI1qptqMMXSSStOmoxMtweCSBrslsJaQWhmHGBko+79 kYX3Gj7KJuK62rXLEPHeDohPrfHA2l/m1rcO/+ODxix7F0QRsDz8WfMpZaVpyvZKOJCD At8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v3si12664320plk.436.2017.09.14.11.49.23; Thu, 14 Sep 2017 11:49:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751728AbdINStW (ORCPT + 7 others); Thu, 14 Sep 2017 14:49:22 -0400 Received: from foss.arm.com ([217.140.101.70]:39516 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751715AbdINStV (ORCPT ); Thu, 14 Sep 2017 14:49:21 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 70D781435; Thu, 14 Sep 2017 11:49:21 -0700 (PDT) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9715D3F483; Thu, 14 Sep 2017 11:49:20 -0700 (PDT) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, wangxiongfeng2@huawei.com, hanjun.guo@linaro.org, jhugo@codeaurora.org, john.garry@huawei.com, austinwc@codeaurora.org, sudeep.holla@arm.com, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, Jeremy Linton Subject: [PATCH 0/6] Support PPTT for ARM64 Date: Thu, 14 Sep 2017 13:49:05 -0500 Message-Id: <20170914184918.20406-1-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org ACPI 6.2 adds the Processor Properties Topology Table (PPTT), which is used to describe the processor and cache topologies. Ideally it is used to extend/override information provided by the hardware, but right now ARM64 is entirely dependent on firmware provided tables. This patch parses the table for the cache topology and CPU topology. For the latter we also add an additional topology_cod_id() macro, and a package_id for arm64. Initially the physical id will match the cluster id, but we update users of the cluster to utilize the new macro. When we enable PPTT for the arm64 the cluster/socket starts to differ. Because of this we also make some dynamic decisions about mapping thread/core/cod/socket to the thread/socket used by the scheduler. For example on juno: [root@mammon-juno-rh topology]# lstopo-no-graphics Machine (7048MB) Package L#0 L2 L#0 (1024KB) + Core L#0 L1d L#0 (32KB) + L1i L#0 (32KB) + PU L#0 (P#0) L1d L#1 (32KB) + L1i L#1 (32KB) + PU L#1 (P#1) L1d L#2 (32KB) + L1i L#2 (32KB) + PU L#2 (P#2) L1d L#3 (32KB) + L1i L#3 (32KB) + PU L#3 (P#3) L2 L#1 (2048KB) + Core L#1 L1d L#4 (32KB) + L1i L#4 (48KB) + PU L#4 (P#4) L1d L#5 (32KB) + L1i L#5 (48KB) + PU L#5 (P#5) HostBridge L#0 PCIBridge PCIBridge PCIBridge PCI 1095:3132 Block(Disk) L#0 "sda" PCIBridge PCI 1002:68f9 GPU L#1 "renderD128" GPU L#2 "card0" GPU L#3 "controlD64" PCIBridge PCI 11ab:4380 Net L#4 "enp8s0" Jeremy Linton (6): ACPI/PPTT: Add Processor Properties Topology Table parsing ACPI: Enable PPTT support on ARM64 drivers: base: cacheinfo: arm64: Add support for ACPI based firmware tables Topology: Add cluster on die macros and arm64 decoding arm64: Fixup users of topology_physical_package_id arm64: topology: Enable ACPI/PPTT based CPU topology. arch/arm64/Kconfig | 1 + arch/arm64/include/asm/topology.h | 4 +- arch/arm64/kernel/cacheinfo.c | 23 +- arch/arm64/kernel/topology.c | 76 +++++- drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/pptt.c | 508 ++++++++++++++++++++++++++++++++++++++ drivers/base/cacheinfo.c | 17 +- drivers/clk/clk-mb86s7x.c | 2 +- drivers/cpufreq/arm_big_little.c | 2 +- drivers/firmware/psci_checker.c | 2 +- include/linux/cacheinfo.h | 10 +- include/linux/topology.h | 5 + 13 files changed, 634 insertions(+), 20 deletions(-) create mode 100644 drivers/acpi/pptt.c -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html