From patchwork Wed Aug 29 06:55:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 11009 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 1B36323F25 for ; Wed, 29 Aug 2012 06:56:17 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 4998BA186A6 for ; Wed, 29 Aug 2012 06:55:45 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id j25so459132iaf.11 for ; Tue, 28 Aug 2012 23:56:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf :x-pgp-universal:from:to:date:message-id:x-mailer:in-reply-to :references:mime-version:cc:subject:x-beenthere:x-mailman-version :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:content-type:content-transfer-encoding :sender:errors-to:x-gm-message-state; bh=ioXTdOdLIxOgsXQ6xMIYyIBvEtDtBstZsZ2u9eB9jUU=; b=WLW5dadOu5l+VySq6/VKNSgBVZKIZkzxYSUdZL1sEpRCV19LTmIaq3LvERN2Sf2oJv RYTxytQrUaQuWaS8lUjnuE9vWo81bOFfG6QqLcmHt8C6/iSpVaEpqrLJa/JhEJG/jBNN XUQ9vGd+HoDwhKasMHWpBxoaIJOH3kLun9XO98kNKpg7KMVhki2sT4xq3fmAqvKRjPwF 1xTw9uST5hRmlUpH8GO3nz3Hx6VxBoFHvxtAgEwrvpPQgh+aW1Siyxq3aBUf7xLDuKzK 47qVERnWphWE8asJDJA0OjbTOEepFCPOpfkOWCDMrVmEHJVz9a0b2qLd/Fz0TjpURjde Fknw== Received: by 10.50.45.162 with SMTP id o2mr612056igm.0.1346223376532; Tue, 28 Aug 2012 23:56:16 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp68324igc; Tue, 28 Aug 2012 23:56:15 -0700 (PDT) Received: by 10.180.79.229 with SMTP id m5mr1463214wix.13.1346223375214; Tue, 28 Aug 2012 23:56:15 -0700 (PDT) Received: from mombin.canonical.com (mombin.canonical.com. [91.189.95.16]) by mx.google.com with ESMTP id d6si11775867wiv.2.2012.08.28.23.56.13; Tue, 28 Aug 2012 23:56:15 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T6cCC-0008DV-TF; Wed, 29 Aug 2012 06:56:12 +0000 Received: from hqemgate04.nvidia.com ([216.228.121.35]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T6cCA-0008D4-9g for linaro-mm-sig@lists.linaro.org; Wed, 29 Aug 2012 06:56:10 +0000 Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Tue, 28 Aug 2012 23:55:26 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp05.nvidia.com (PGP Universal service); Tue, 28 Aug 2012 23:56:01 -0700 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Tue, 28 Aug 2012 23:56:01 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.264.0; Tue, 28 Aug 2012 23:56:04 -0700 Received: from daphne.nvidia.com (Not Verified[172.16.212.96]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Tue, 28 Aug 2012 23:56:04 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-25-186.nvidia.com [10.21.25.186]) by daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id q7T6tkpl016768; Tue, 28 Aug 2012 23:56:00 -0700 (PDT) From: Hiroshi Doyu To: Date: Wed, 29 Aug 2012 09:55:32 +0300 Message-ID: <1346223335-31455-3-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1346223335-31455-1-git-send-email-hdoyu@nvidia.com> References: <1346223335-31455-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 Cc: linux@arm.linux.org.uk, arnd@arndb.de, minchan@kernel.org, konrad.wilk@oracle.com, linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-mm@kvack.org, iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, kyungmin.park@samsung.com, pullip.cho@samsung.com, linux-arm-kernel@lists.infradead.org Subject: [Linaro-mm-sig] [RFC 2/5] ARM: dma-mapping: New dma_map_ops->iova_{alloc, free}() functions X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQni+nPce+02KFm0BpobEAq+MUVFHiPRk4wbjhX+LSKexPuDYR6Lygxs6MsdTjbW9Cin5hDO There are some cases that IOVA allocation and mapping have to be done seperately, especially for perf optimization reasons. This patch allows client modules to {alloc,free} IOVA space without backing up actual pages for that area. Signed-off-by: Hiroshi Doyu --- arch/arm/include/asm/dma-mapping.h | 17 +++++++++++++++++ arch/arm/mm/dma-mapping.c | 17 +++++++++++++++++ include/linux/dma-mapping.h | 2 ++ 3 files changed, 36 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 1cbd279..5b86600 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -170,6 +170,23 @@ static inline void dma_free_attrs(struct device *dev, size_t size, ops->free(dev, size, cpu_addr, dma_handle, attrs); } +static inline dma_addr_t dma_iova_alloc(struct device *dev, size_t size) +{ + struct dma_map_ops *ops = get_dma_ops(dev); + BUG_ON(!ops); + + return ops->iova_alloc(dev, size); +} + +static inline void dma_iova_free(struct device *dev, dma_addr_t addr, + size_t size) +{ + struct dma_map_ops *ops = get_dma_ops(dev); + BUG_ON(!ops); + + ops->iova_free(dev, addr, size); +} + static inline size_t dma_iova_get_free_total(struct device *dev) { struct dma_map_ops *ops = get_dma_ops(dev); diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index db17338..c18522a 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1080,6 +1080,13 @@ static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping, return mapping->base + (start << (mapping->order + PAGE_SHIFT)); } +static dma_addr_t arm_iommu_iova_alloc(struct device *dev, size_t size) +{ + struct dma_iommu_mapping *mapping = dev->archdata.mapping; + + return __alloc_iova(mapping, size); +} + static inline void __free_iova(struct dma_iommu_mapping *mapping, dma_addr_t addr, size_t size) { @@ -1094,6 +1101,14 @@ static inline void __free_iova(struct dma_iommu_mapping *mapping, spin_unlock_irqrestore(&mapping->lock, flags); } +static void arm_iommu_iova_free(struct device *dev, dma_addr_t addr, + size_t size) +{ + struct dma_iommu_mapping *mapping = dev->archdata.mapping; + + __free_iova(mapping, addr, size); +} + static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) { struct page **pages; @@ -1773,6 +1788,8 @@ struct dma_map_ops iommu_ops = { .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu, .sync_sg_for_device = arm_iommu_sync_sg_for_device, + .iova_alloc = arm_iommu_iova_alloc, + .iova_free = arm_iommu_iova_free, .iova_get_free_total = arm_iommu_iova_get_free_total, .iova_get_free_max = arm_iommu_iova_get_free_max, }; diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index 0337182..e85aa04 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -53,6 +53,8 @@ struct dma_map_ops { #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK u64 (*get_required_mask)(struct device *dev); #endif + dma_addr_t (*iova_alloc)(struct device *dev, size_t size); + void (*iova_free)(struct device *dev, dma_addr_t addr, size_t size); size_t (*iova_get_free_total)(struct device *dev); size_t (*iova_get_free_max)(struct device *dev);