From patchwork Wed Aug 22 10:20:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi Doyu X-Patchwork-Id: 10872 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0DA3323E1B for ; Wed, 22 Aug 2012 10:21:28 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id B10E7A18D23 for ; Wed, 22 Aug 2012 10:21:16 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id j38so707700iad.11 for ; Wed, 22 Aug 2012 03:21:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf :x-pgp-universal:from:to:date:message-id:x-mailer:in-reply-to :references:mime-version:cc:subject:x-beenthere:x-mailman-version :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:content-type:content-transfer-encoding :sender:errors-to:x-gm-message-state; bh=1zhS1ZGOPr8E/LwWSC9GKzsRs8mp+qvj3AI0alJFxc0=; b=VlfJENhiTCBybGp8rMo1JpaadfVlnrydg7iM9DwFwoQn5G9MNtdTIutHNjPV502XNC w/ewkCGBqOyj3JVhIu6hoaiew8fJYRNzYZNczpAlE956A7/L6u7TvPosQ7SQN7EYzHJa G7xJrzZvB1gWRFk4pRdKNAQS4fnUgqxNBoTKagebkbDECbDGsZHWJQlCHhRgDgR1V4Bb dbhOm4GzNnYFAMBSvnP3exe3mcpwg8nVfsxOP6PzycMzKdG62GR5wuECcop0EZhDTKB5 kTAou4U5gWBOeJizg+jJo9kmZM+bWJwLiXCxwF3vfQg3JC3LYCqkYfDUpauYjPkmOkBo TvWw== Received: by 10.50.10.201 with SMTP id k9mr1533638igb.28.1345630887460; Wed, 22 Aug 2012 03:21:27 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp194257igc; Wed, 22 Aug 2012 03:21:26 -0700 (PDT) Received: by 10.180.98.138 with SMTP id ei10mr4778707wib.1.1345630886106; Wed, 22 Aug 2012 03:21:26 -0700 (PDT) Received: from mombin.canonical.com (mombin.canonical.com. [91.189.95.16]) by mx.google.com with ESMTP id o4si46865434wiy.43.2012.08.22.03.21.25; Wed, 22 Aug 2012 03:21:26 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T483v-0003ph-3R; Wed, 22 Aug 2012 10:21:23 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1T483s-0003p1-MU for linaro-mm-sig@lists.linaro.org; Wed, 22 Aug 2012 10:21:21 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Wed, 22 Aug 2012 03:22:08 -0700 Received: from hqemhub01.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Wed, 22 Aug 2012 03:20:55 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 22 Aug 2012 03:20:55 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.264.0; Wed, 22 Aug 2012 03:20:54 -0700 Received: from daphne.nvidia.com (Not Verified[172.16.212.96]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Wed, 22 Aug 2012 03:20:54 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-25-186.nvidia.com [10.21.25.186]) by daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id q7MAKWes027973; Wed, 22 Aug 2012 03:20:51 -0700 (PDT) From: Hiroshi Doyu To: Marek Szyprowski Date: Wed, 22 Aug 2012 13:20:30 +0300 Message-ID: <1345630830-9586-5-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1345630830-9586-1-git-send-email-hdoyu@nvidia.com> References: <1345630830-9586-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 Cc: "linux@arm.linux.org.uk" , "arnd@arndb.de" , "konrad.wilk@oracle.com" , "minchan@kernel.org" , "linux-kernel@vger.kernel.org" , "linaro-mm-sig@lists.linaro.org" , "linux-mm@kvack.org" , "kyungmin.park@samsung.com" , "linux-arm-kernel@lists.infradead.org" Subject: [Linaro-mm-sig] [RFC 4/4] ARM: dma-mapping: dma_{alloc, free}_coherent with empty attrs X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQl9ocGY/3QeJ7c1IC8TG61L9QfiaTieXVU57u7f1o0k3pOq3sjcbY0ip5nNQIDDus7UDdBS There's possibility that this attrs be used later to set. Signed-off-by: Hiroshi Doyu --- arch/arm/include/asm/dma-mapping.h | 21 +++++++++++++++++---- 1 files changed, 17 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index c27d855..96b67c7 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -125,8 +125,6 @@ extern int dma_supported(struct device *dev, u64 mask); extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs); -#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL) - static inline void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, struct dma_attrs *attrs) @@ -135,11 +133,21 @@ static inline void *dma_alloc_attrs(struct device *dev, size_t size, void *cpu_addr; BUG_ON(!ops); + if (flag & GFP_ATOMIC) + dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs); + cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); return cpu_addr; } +static inline void *dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + DEFINE_DMA_ATTRS(attrs); + return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs); +} + /** * arm_dma_free - free memory allocated by arm_dma_alloc * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices @@ -157,8 +165,6 @@ static inline void *dma_alloc_attrs(struct device *dev, size_t size, extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle, struct dma_attrs *attrs); -#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL) - static inline void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle, struct dma_attrs *attrs) @@ -170,6 +176,13 @@ static inline void dma_free_attrs(struct device *dev, size_t size, ops->free(dev, size, cpu_addr, dma_handle, attrs); } +static inline void dma_free_coherent(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle) +{ + DEFINE_DMA_ATTRS(attrs); + return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); +} + /** * arm_dma_mmap - map a coherent DMA allocation into user space * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices