From patchwork Tue Jun 12 07:19:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 9226 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 231B523E53 for ; Tue, 12 Jun 2012 13:08:29 +0000 (UTC) Received: from mail-gg0-f180.google.com (mail-gg0-f180.google.com [209.85.161.180]) by fiordland.canonical.com (Postfix) with ESMTP id D077EA182E8 for ; Tue, 12 Jun 2012 13:08:28 +0000 (UTC) Received: by mail-gg0-f180.google.com with SMTP id f1so3674639ggn.11 for ; Tue, 12 Jun 2012 06:08:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to :date:message-id:x-mailer:in-reply-to:references:mime-version :x-mailman-approved-at:subject:x-beenthere:x-mailman-version :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:content-type:content-transfer-encoding :sender:errors-to:x-gm-message-state; bh=Dbr1LUHem3/ZE7pxn3tilKG4hTcI6ey1EEBCHoDLqR4=; b=fC86FjceB6j8QXs38Mq0sor5UpYmFHlha4U/hiPaJomB3GgTPiScBdvX/L7l8UjHdq BMnAOUoCbQ9MFVwxBP+B2XkaPWOUIwemVeUJjC8rkaZdpCPxBscanu4Vswd+GCQzxTj+ zYPurCMfLs0CstM2Nl+wqHmbdNq9qYPBJrDlIKxqZ8FAflMdszIW7UC8/65T0zMa2xXg osq62fI0/4VqfROaj0os7cT+0xpuOdLQuS/0Hwx426ehZIhcZNAqr5Pj2yn7yT8R1hKK HD5ddVUqzJ5xVoNaST5LnbIZOBlDfQ88LwKKDmTv9yPS54mBuBNPSJl6iR/6cmP9usDt yBcQ== Received: by 10.50.195.234 with SMTP id ih10mr8240439igc.0.1339506508416; Tue, 12 Jun 2012 06:08:28 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp166060ibb; Tue, 12 Jun 2012 06:08:26 -0700 (PDT) Received: by 10.180.86.5 with SMTP id l5mr28946662wiz.6.1339506505733; Tue, 12 Jun 2012 06:08:25 -0700 (PDT) Received: from mombin.canonical.com (mombin.canonical.com. [91.189.95.16]) by mx.google.com with ESMTP id m20si29020999wee.30.2012.06.12.06.08.23; Tue, 12 Jun 2012 06:08:25 -0700 (PDT) Received-SPF: neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) client-ip=91.189.95.16; Authentication-Results: mx.google.com; spf=neutral (google.com: 91.189.95.16 is neither permitted nor denied by best guess record for domain of linaro-mm-sig-bounces@lists.linaro.org) smtp.mail=linaro-mm-sig-bounces@lists.linaro.org Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1SeQpX-0005kE-0G; Tue, 12 Jun 2012 13:08:19 +0000 Received: from eu1sys200aog107.obsmtp.com ([207.126.144.123]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1SeLNr-000682-Vh for linaro-mm-sig@lists.linaro.org; Tue, 12 Jun 2012 07:19:24 +0000 Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob107.postini.com ([207.126.147.11]) with SMTP ID DSNKT9btet5zcatJuOWV2DgiqrClxSHwn7ia@postini.com; Tue, 12 Jun 2012 07:19:23 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 039CC76; Tue, 12 Jun 2012 07:18:59 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 9824B4E; Tue, 12 Jun 2012 04:31:19 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 6FAA1A8072; Tue, 12 Jun 2012 09:19:17 +0200 (CEST) Received: from lmenx321.lme.st.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 12 Jun 2012 09:19:20 +0200 From: To: Date: Tue, 12 Jun 2012 09:19:07 +0200 Message-ID: <1339485548-19320-4-git-send-email-benjamin.gaignard@stericsson.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1339485548-19320-1-git-send-email-benjamin.gaignard@stericsson.com> References: <1339485548-19320-1-git-send-email-benjamin.gaignard@stericsson.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 12 Jun 2012 13:08:15 +0000 Subject: [Linaro-mm-sig] [PATCH v5 3/4] add CMA heap X-BeenThere: linaro-mm-sig@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: "Unified memory management interest group." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linaro-mm-sig-bounces@lists.linaro.org Errors-To: linaro-mm-sig-bounces@lists.linaro.org X-Gm-Message-State: ALoCoQn03+YXHFJQ+OwaCFkD8VIXo63RETe5fEYfulgccG2KwegCgGficVJHcNS0RjMpbACXOPTJ From: Benjamin Gaignard New heap type ION_HEAP_TYPE_DMA where allocation is done with dma_alloc_coherent API. device coherent_dma_mask must be set to DMA_BIT_MASK(32). Add ion_heap_create_full function to avoid breaking backward compatibilty. Signed-off-by: Benjamin Gaignard --- drivers/gpu/ion/Makefile | 4 +- drivers/gpu/ion/ion_cma_heap.c | 175 ++++++++++++++++++++++++++++++++++++++++ drivers/gpu/ion/ion_heap.c | 18 ++++- drivers/gpu/ion/ion_priv.h | 11 +++ include/linux/ion.h | 3 + 5 files changed, 209 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/ion/ion_cma_heap.c diff --git a/drivers/gpu/ion/Makefile b/drivers/gpu/ion/Makefile index 73fe3fa..32d3385 100644 --- a/drivers/gpu/ion/Makefile +++ b/drivers/gpu/ion/Makefile @@ -1,2 +1,4 @@ -obj-$(CONFIG_ION) += ion.o ion_heap.o ion_system_heap.o ion_carveout_heap.o +ion-driver-objs += ion.o ion_heap.o ion_system_heap.o ion_carveout_heap.o +obj-$(CONFIG_ION) += ion-driver.o +obj-$(CONFIG_CMA) += ion_cma_heap.o obj-$(CONFIG_ION_TEGRA) += tegra/ diff --git a/drivers/gpu/ion/ion_cma_heap.c b/drivers/gpu/ion/ion_cma_heap.c new file mode 100644 index 0000000..1569e62 --- /dev/null +++ b/drivers/gpu/ion/ion_cma_heap.c @@ -0,0 +1,175 @@ +/* + * drivers/gpu/ion/ion_cma_heap.c + * + * Copyright (C) Linaro 2012 + * Author: for ST-Ericsson. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include + +/* for ion_heap_ops structure */ +#include "ion_priv.h" + +#define ION_CMA_ALLOCATE_FAILED -1 + +struct ion_cma_buffer_info { + void *cpu_addr; + dma_addr_t handle; + struct sg_table *table; +}; + +/* ION CMA heap operations functions */ +static int ion_cma_allocate(struct ion_heap *heap, struct ion_buffer *buffer, + unsigned long len, unsigned long align, + unsigned long flags) +{ + struct device *dev = heap->priv; + struct ion_cma_buffer_info *info; + int n_pages, i; + struct scatterlist *sg; + + dev_dbg(dev, "Request buffer allocation len %ld\n", len); + + info = kzalloc(sizeof(struct ion_cma_buffer_info), GFP_KERNEL); + if (!info) { + dev_err(dev, "Can't allocate buffer info\n"); + return ION_CMA_ALLOCATE_FAILED; + } + + info->cpu_addr = dma_alloc_coherent(dev, len, &(info->handle), 0); + + if (!info->cpu_addr) { + dev_err(dev, "Fail to allocate buffer\n"); + goto err; + } + + info->table = kmalloc(sizeof(struct sg_table), GFP_KERNEL); + if (!info->table) { + dev_err(dev, "Fail to allocate sg table\n"); + goto err; + } + + n_pages = PAGE_ALIGN(len) >> PAGE_SHIFT; + + /* CMA allocate one big chunk of memory + * so we will only have one entry in sg table */ + i = sg_alloc_table(info->table, 1, GFP_KERNEL); + if (i) { + kfree(info->table); + goto err; + } + for_each_sg(info->table->sgl, sg, info->table->nents, i) { + /* we will this loop only one time */ + struct page *page = pfn_to_page(dma_to_pfn(dev, info->handle)); + sg_set_page(sg, page, PAGE_SIZE * n_pages, 0); + } + + /* keep this for memory release */ + buffer->priv_virt = info; + dev_dbg(dev, "Allocate buffer %p\n", buffer); + return 0; + +err: + kfree(info); + return ION_CMA_ALLOCATE_FAILED; +} + +static void ion_cma_free(struct ion_buffer *buffer) +{ + struct device *dev = buffer->heap->priv; + struct ion_cma_buffer_info *info = buffer->priv_virt; + + dev_dbg(dev, "Release buffer %p\n", buffer); + /* release memory */ + dma_free_coherent(dev, buffer->size, info->cpu_addr, info->handle); + /* release sg table */ + kfree(info->table); + kfree(info); +} + +/* return physical address in addr */ +static int ion_cma_phys(struct ion_heap *heap, struct ion_buffer *buffer, + ion_phys_addr_t *addr, size_t *len) +{ + struct device *dev = heap->priv; + struct ion_cma_buffer_info *info = buffer->priv_virt; + + dev_dbg(dev, "Return buffer %p physical address 0x%x\n", buffer, + virt_to_phys(info->cpu_addr)); + + *addr = virt_to_phys(info->cpu_addr); + *len = buffer->size; + + return 0; +} + +struct sg_table *ion_cma_heap_map_dma(struct ion_heap *heap, + struct ion_buffer *buffer) +{ + struct ion_cma_buffer_info *info = buffer->priv_virt; + + return info->table; +} + +void ion_cma_heap_unmap_dma(struct ion_heap *heap, + struct ion_buffer *buffer) +{ + return; +} + +static int ion_cma_mmap(struct ion_heap *mapper, struct ion_buffer *buffer, + struct vm_area_struct *vma) +{ + struct device *dev = buffer->heap->priv; + struct ion_cma_buffer_info *info = buffer->priv_virt; + + return dma_mmap_coherent(dev, vma, info->cpu_addr, info->handle, + buffer->size); +} + +static struct ion_heap_ops ion_cma_ops = { + .allocate = ion_cma_allocate, + .free = ion_cma_free, + .map_dma = ion_cma_heap_map_dma, + .unmap_dma = ion_cma_heap_unmap_dma, + .phys = ion_cma_phys, + .map_user = ion_cma_mmap, +}; + +struct ion_heap *ion_cma_heap_create(struct ion_platform_heap *data, + struct device *dev) +{ + struct ion_heap *heap; + + heap = kzalloc(sizeof(struct ion_heap), GFP_KERNEL); + + if (!heap) + return ERR_PTR(-ENOMEM); + + heap->ops = &ion_cma_ops; + /* set device as private heaps data, later it will be + * used to make the link with reserved CMA memory */ + heap->priv = dev; + heap->type = ION_HEAP_TYPE_DMA; + return heap; +} + +void ion_cma_heap_destroy(struct ion_heap *heap) +{ + kfree(heap); +} diff --git a/drivers/gpu/ion/ion_heap.c b/drivers/gpu/ion/ion_heap.c index 8ce3c19..2791259 100644 --- a/drivers/gpu/ion/ion_heap.c +++ b/drivers/gpu/ion/ion_heap.c @@ -18,7 +18,8 @@ #include #include "ion_priv.h" -struct ion_heap *ion_heap_create(struct ion_platform_heap *heap_data) +struct ion_heap *ion_heap_create_full(struct ion_platform_heap *heap_data, + struct device *dev) { struct ion_heap *heap = NULL; @@ -32,6 +33,11 @@ struct ion_heap *ion_heap_create(struct ion_platform_heap *heap_data) case ION_HEAP_TYPE_CARVEOUT: heap = ion_carveout_heap_create(heap_data); break; +#ifdef CONFIG_CMA + case ION_HEAP_TYPE_DMA: + heap = ion_cma_heap_create(heap_data, dev); + break; +#endif default: pr_err("%s: Invalid heap type %d\n", __func__, heap_data->type); @@ -50,6 +56,11 @@ struct ion_heap *ion_heap_create(struct ion_platform_heap *heap_data) return heap; } +struct ion_heap *ion_heap_create(struct ion_platform_heap *heap_data) +{ + return ion_heap_create_full(heap_data, NULL); +} + void ion_heap_destroy(struct ion_heap *heap) { if (!heap) @@ -65,6 +76,11 @@ void ion_heap_destroy(struct ion_heap *heap) case ION_HEAP_TYPE_CARVEOUT: ion_carveout_heap_destroy(heap); break; +#ifdef CONFIG_CMA + case ION_HEAP_TYPE_DMA: + ion_cma_heap_destroy(heap); + break; +#endif default: pr_err("%s: Invalid heap type %d\n", __func__, heap->type); diff --git a/drivers/gpu/ion/ion_priv.h b/drivers/gpu/ion/ion_priv.h index 58945ab..36409c2 100644 --- a/drivers/gpu/ion/ion_priv.h +++ b/drivers/gpu/ion/ion_priv.h @@ -22,6 +22,7 @@ #include #include #include +#include struct ion_buffer *ion_handle_buffer(struct ion_handle *handle); @@ -147,6 +148,9 @@ void ion_device_add_heap(struct ion_device *dev, struct ion_heap *heap); */ struct ion_heap *ion_heap_create(struct ion_platform_heap *); +struct ion_heap *ion_heap_create_full(struct ion_platform_heap *, + struct device *); + void ion_heap_destroy(struct ion_heap *); struct ion_heap *ion_system_heap_create(struct ion_platform_heap *); @@ -165,6 +169,13 @@ ion_phys_addr_t ion_carveout_allocate(struct ion_heap *heap, unsigned long size, unsigned long align); void ion_carveout_free(struct ion_heap *heap, ion_phys_addr_t addr, unsigned long size); + +#ifdef CONFIG_CMA +struct ion_heap *ion_cma_heap_create(struct ion_platform_heap *, + struct device *); +void ion_cma_heap_destroy(struct ion_heap *); +#endif + /** * The carveout heap returns physical addresses, since 0 may be a valid * physical address, this is used to indicate allocation failed diff --git a/include/linux/ion.h b/include/linux/ion.h index f6bb4df..9ed9e52 100644 --- a/include/linux/ion.h +++ b/include/linux/ion.h @@ -27,12 +27,14 @@ struct ion_handle; * @ION_HEAP_TYPE_CARVEOUT: memory allocated from a prereserved * carveout heap, allocations are physically * contiguous + * @ION_HEAP_TYPE_DMA: memory allocated via DMA API * @ION_HEAP_END: helper for iterating over heaps */ enum ion_heap_type { ION_HEAP_TYPE_SYSTEM, ION_HEAP_TYPE_SYSTEM_CONTIG, ION_HEAP_TYPE_CARVEOUT, + ION_HEAP_TYPE_DMA, ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always are at the end of this enum */ ION_NUM_HEAPS, @@ -41,6 +43,7 @@ enum ion_heap_type { #define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM) #define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG) #define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT) +#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA) #ifdef __KERNEL__ struct ion_device;