From patchwork Wed Jul 2 02:03:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 32938 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yk0-f198.google.com (mail-yk0-f198.google.com [209.85.160.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id B2C8620672 for ; Wed, 2 Jul 2014 02:03:07 +0000 (UTC) Received: by mail-yk0-f198.google.com with SMTP id 9sf17807731ykp.9 for ; Tue, 01 Jul 2014 19:03:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:mime-version:in-reply-to:references :date:message-id:subject:from:to:cc:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=WmyyKGLEyOSrPuvnGWwT9hf+vMvew4CKxLSUUzjiAis=; b=U4muCMaTDje17RKbJ24U9Q2iqmNIAByw0OrYo6+QBEizWogOI/prYAMB99ju8s/1a/ dGhGVXbARaWexxV2B1ic91QdCtZKvf/kGUMRPy21vCFng2ePTNzBh1MvTocTPt6g/GOB 2IUeIzAjHMBp7IvLP5+2y9ZzdTgMlJ4Ktmw3XiKdAXZPXTOkTkAr2locxO1bMOXRYzrf 0R714JFJ9TfTGnfPk6g1+lSGkuKxr+yw44eqhlDEdFnsf5uPREwymH1okM0rYd74/KA+ NdIxhpm2EVkA4G6NnvuCR0l/wWHv1OxuqOIGzd+faxk9IXUj/DTwkJHD/+mOQ1osoUdU aqaQ== X-Gm-Message-State: ALoCoQlxQ78NbxmnHDhw/ei6Pr6Bo7kXoO4ecbWdQRafQujoKOjZ6/h+j2kztcvQzCIu/Y5fViMN X-Received: by 10.52.36.211 with SMTP id s19mr23457641vdj.7.1404266586618; Tue, 01 Jul 2014 19:03:06 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.80.203 with SMTP id c69ls1688499qgd.85.gmail; Tue, 01 Jul 2014 19:03:06 -0700 (PDT) X-Received: by 10.221.9.72 with SMTP id ov8mr46728306vcb.27.1404266586530; Tue, 01 Jul 2014 19:03:06 -0700 (PDT) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by mx.google.com with ESMTPS id xq7si3360404veb.103.2014.07.01.19.03.06 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 01 Jul 2014 19:03:06 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) client-ip=209.85.220.172; Received: by mail-vc0-f172.google.com with SMTP id hy10so9739409vcb.31 for ; Tue, 01 Jul 2014 19:03:06 -0700 (PDT) X-Received: by 10.221.42.135 with SMTP id ty7mr46703111vcb.14.1404266586420; Tue, 01 Jul 2014 19:03:06 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp259089vcb; Tue, 1 Jul 2014 19:03:05 -0700 (PDT) X-Received: by 10.66.224.38 with SMTP id qz6mr468995pac.153.1404266585583; Tue, 01 Jul 2014 19:03:05 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id hr2si28706228pbb.187.2014.07.01.19.03.04; Tue, 01 Jul 2014 19:03:04 -0700 (PDT) Received-SPF: none (google.com: linux-arm-msm-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756850AbaGBCDD (ORCPT + 3 others); Tue, 1 Jul 2014 22:03:03 -0400 Received: from mail-oa0-f50.google.com ([209.85.219.50]:51447 "EHLO mail-oa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753297AbaGBCDC (ORCPT ); Tue, 1 Jul 2014 22:03:02 -0400 Received: by mail-oa0-f50.google.com with SMTP id n16so11503475oag.23 for ; Tue, 01 Jul 2014 19:03:01 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.60.45.130 with SMTP id n2mr53757521oem.12.1404266581437; Tue, 01 Jul 2014 19:03:01 -0700 (PDT) Received: by 10.182.233.166 with HTTP; Tue, 1 Jul 2014 19:03:01 -0700 (PDT) In-Reply-To: <53B2F7C3.5060107@codeaurora.org> References: <1ba7771e910084cd0820c19ca5994fe1b3d6451d.1404231535.git.viresh.kumar@linaro.org> <53B2F7C3.5060107@codeaurora.org> Date: Wed, 2 Jul 2014 07:33:01 +0530 Message-ID: Subject: Re: [PATCH 07/14] cpufreq: cpu0: OPPs can be populated at runtime From: Viresh Kumar To: Stephen Boyd Cc: "Rafael J. Wysocki" , Shawn Guo , Lists linaro-kernel , "linux-pm@vger.kernel.org" , Linux Kernel Mailing List , Arvind Chauhan , linux-arm-msm@vger.kernel.org, Sachin Kamat , Thomas P Abraham , Nishanth Menon , Tomasz Figa Sender: linux-arm-msm-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: viresh.kumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On 1 July 2014 23:32, Stephen Boyd wrote: > Please update the binding as well to indicate that this property is now > optional. Does this look fine.. in unit of nanoseconds. - voltage-tolerance: Specify the CPU voltage tolerance in percentage. --- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt index f055515..366690c 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt @@ -8,10 +8,12 @@ Both required and optional properties listed below must be defined under node /cpus/cpu@0. Required properties: -- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt - for details +- None Optional properties: +- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt for + details. OPPs *must* be supplied either via DT, i.e. this property, or + populated at runtime. - clock-latency: Specify the possible maximum transition latency for clock,