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[209.132.180.67]) by mx.google.com with ESMTP id a13si2175565pdj.106.2015.07.16.04.36.16; Thu, 16 Jul 2015 04:36:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755058AbbGPL12 (ORCPT + 27 others); Thu, 16 Jul 2015 07:27:28 -0400 Received: from mail-pd0-f170.google.com ([209.85.192.170]:36459 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754541AbbGPL1V (ORCPT ); Thu, 16 Jul 2015 07:27:21 -0400 Received: by pdjr16 with SMTP id r16so43089992pdj.3 for ; Thu, 16 Jul 2015 04:27:21 -0700 (PDT) X-Received: by 10.70.38.170 with SMTP id h10mr17548043pdk.20.1437046041234; Thu, 16 Jul 2015 04:27:21 -0700 (PDT) Received: from localhost ([122.171.186.190]) by smtp.gmail.com with ESMTPSA id ug1sm7668850pbc.39.2015.07.16.04.27.19 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 16 Jul 2015 04:27:20 -0700 (PDT) From: Viresh Kumar To: Thomas Gleixner , Daniel Lezcano Cc: linaro-kernel@lists.linaro.org, linux-kernel@vger.kernel.org, Viresh Kumar , Steven Miao , adi-buildroot-devel@lists.sourceforge.net Subject: [PATCH 04/23] blackfin/time-ts: Migrate to new 'set-state' interface Date: Thu, 16 Jul 2015 16:56:16 +0530 Message-Id: <2fc23ae5397df8d2e7a48875c8b3fc72f433ff96.1437044517.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.4.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: viresh.kumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Migrate blackfin driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. We weren't doing anything in ->set_mode(RESUME) and so tick_resume() isn't implemented. Cc: Steven Miao Cc: adi-buildroot-devel@lists.sourceforge.net Signed-off-by: Viresh Kumar --- arch/blackfin/kernel/time-ts.c | 136 +++++++++++++++++++++-------------------- 1 file changed, 70 insertions(+), 66 deletions(-) diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c index cb0a4845339e..fb9e95f1b719 100644 --- a/arch/blackfin/kernel/time-ts.c +++ b/arch/blackfin/kernel/time-ts.c @@ -136,44 +136,44 @@ static int bfin_gptmr0_set_next_event(unsigned long cycles, return 0; } -static void bfin_gptmr0_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) +static int bfin_gptmr0_set_periodic(struct clock_event_device *evt) { - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: { #ifndef CONFIG_BF60x - set_gptimer_config(TIMER0_id, \ - TIMER_OUT_DIS | TIMER_IRQ_ENA | \ - TIMER_PERIOD_CNT | TIMER_MODE_PWM); + set_gptimer_config(TIMER0_id, + TIMER_OUT_DIS | TIMER_IRQ_ENA | + TIMER_PERIOD_CNT | TIMER_MODE_PWM); #else - set_gptimer_config(TIMER0_id, TIMER_OUT_DIS - | TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER); + set_gptimer_config(TIMER0_id, + TIMER_OUT_DIS | TIMER_MODE_PWM_CONT | + TIMER_PULSE_HI | TIMER_IRQ_PER); #endif - set_gptimer_period(TIMER0_id, get_sclk() / HZ); - set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1); - enable_gptimers(TIMER0bit); - break; - } - case CLOCK_EVT_MODE_ONESHOT: - disable_gptimers(TIMER0bit); + set_gptimer_period(TIMER0_id, get_sclk() / HZ); + set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1); + enable_gptimers(TIMER0bit); + return 0; +} + +static int bfin_gptmr0_set_oneshot(struct clock_event_device *evt) +{ + disable_gptimers(TIMER0bit); #ifndef CONFIG_BF60x - set_gptimer_config(TIMER0_id, \ - TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM); + set_gptimer_config(TIMER0_id, + TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM); #else - set_gptimer_config(TIMER0_id, TIMER_OUT_DIS | TIMER_MODE_PWM - | TIMER_PULSE_HI | TIMER_IRQ_WID_DLY); + set_gptimer_config(TIMER0_id, + TIMER_OUT_DIS | TIMER_MODE_PWM | TIMER_PULSE_HI | + TIMER_IRQ_WID_DLY); #endif - set_gptimer_period(TIMER0_id, 0); - break; - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - disable_gptimers(TIMER0bit); - break; - case CLOCK_EVT_MODE_RESUME: - break; - } + set_gptimer_period(TIMER0_id, 0); + return 0; +} + +static int bfin_gptmr0_shutdown(struct clock_event_device *evt) +{ + disable_gptimers(TIMER0bit); + return 0; } static void bfin_gptmr0_ack(void) @@ -211,13 +211,16 @@ static struct irqaction gptmr0_irq = { }; static struct clock_event_device clockevent_gptmr0 = { - .name = "bfin_gptimer0", - .rating = 300, - .irq = IRQ_TIMER0, - .shift = 32, - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_next_event = bfin_gptmr0_set_next_event, - .set_mode = bfin_gptmr0_set_mode, + .name = "bfin_gptimer0", + .rating = 300, + .irq = IRQ_TIMER0, + .shift = 32, + .features = CLOCK_EVT_FEAT_PERIODIC | + CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = bfin_gptmr0_set_next_event, + .set_state_shutdown = bfin_gptmr0_shutdown, + .set_state_periodic = bfin_gptmr0_set_periodic, + .set_state_oneshot = bfin_gptmr0_set_oneshot, }; static void __init bfin_gptmr0_clockevent_init(struct clock_event_device *evt) @@ -250,36 +253,35 @@ static int bfin_coretmr_set_next_event(unsigned long cycles, return 0; } -static void bfin_coretmr_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) +static int bfin_coretmr_set_periodic(struct clock_event_device *evt) { - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: { - unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); - bfin_write_TCNTL(TMPWR); - CSYNC(); - bfin_write_TSCALE(TIME_SCALE - 1); - bfin_write_TPERIOD(tcount); - bfin_write_TCOUNT(tcount); - CSYNC(); - bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD); - break; - } - case CLOCK_EVT_MODE_ONESHOT: - bfin_write_TCNTL(TMPWR); - CSYNC(); - bfin_write_TSCALE(TIME_SCALE - 1); - bfin_write_TPERIOD(0); - bfin_write_TCOUNT(0); - break; - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - bfin_write_TCNTL(0); - CSYNC(); - break; - case CLOCK_EVT_MODE_RESUME: - break; - } + unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); + + bfin_write_TCNTL(TMPWR); + CSYNC(); + bfin_write_TSCALE(TIME_SCALE - 1); + bfin_write_TPERIOD(tcount); + bfin_write_TCOUNT(tcount); + CSYNC(); + bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD); + return 0; +} + +static int bfin_coretmr_set_oneshot(struct clock_event_device *evt) +{ + bfin_write_TCNTL(TMPWR); + CSYNC(); + bfin_write_TSCALE(TIME_SCALE - 1); + bfin_write_TPERIOD(0); + bfin_write_TCOUNT(0); + return 0; +} + +static int bfin_coretmr_shutdown(struct clock_event_device *evt) +{ + bfin_write_TCNTL(0); + CSYNC(); + return 0; } void bfin_coretmr_init(void) @@ -335,7 +337,9 @@ void bfin_coretmr_clockevent_init(void) evt->shift = 32; evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; evt->set_next_event = bfin_coretmr_set_next_event; - evt->set_mode = bfin_coretmr_set_mode; + evt->set_state_shutdown = bfin_coretmr_shutdown; + evt->set_state_periodic = bfin_coretmr_set_periodic; + evt->set_state_oneshot = bfin_coretmr_set_oneshot; clock_tick = get_cclk() / TIME_SCALE; evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);