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[2001:770:15f::2]) by mx.google.com with ESMTPS id p3si475682wia.45.2014.02.25.08.53.40 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2014 08:53:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:770:15f::2 as permitted sender) client-ip=2001:770:15f::2; Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WILG6-0006Oc-FM; Tue, 25 Feb 2014 16:53:30 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WILG4-0008KH-6X; Tue, 25 Feb 2014 16:53:28 +0000 Received: from service87.mimecast.com ([91.220.42.44]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WILG1-0008Iv-Bv for linux-arm-kernel@lists.infradead.org; Tue, 25 Feb 2014 16:53:26 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Tue, 25 Feb 2014 16:53:02 +0000 Received: from red-moon ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 25 Feb 2014 16:53:00 +0000 Date: Tue, 25 Feb 2014 16:54:11 +0000 From: Lorenzo Pieralisi To: Mark Brown Subject: Re: [PATCH 1/4] arm64: topology: Implement basic CPU topology support Message-ID: <20140225165411.GA3883@red-moon> References: <1393302345-18253-1-git-send-email-broonie@kernel.org> <1393302345-18253-2-git-send-email-broonie@kernel.org> MIME-Version: 1.0 In-Reply-To: <1393302345-18253-2-git-send-email-broonie@kernel.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginalArrivalTime: 25 Feb 2014 16:53:00.0606 (UTC) FILETIME=[0ABB75E0:01CF324A] X-MC-Unique: 114022516530208501 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140225_115325_586846_88698E2F X-CRM114-Status: GOOD ( 23.25 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [91.220.42.44 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Catalin Marinas , "linaro-kernel@lists.linaro.org" , Will Deacon , "linux-arm-kernel@lists.infradead.org" , Mark Brown X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lorenzo.pieralisi@arm.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Content-Disposition: inline Hi Mark, On Tue, Feb 25, 2014 at 04:25:42AM +0000, Mark Brown wrote: > From: Mark Brown > > Add basic CPU topology support to arm64, based on the existing pre-v8 > code and some work done by Mark Hambleton. This patch does not > implement any topology discovery support since that should be based on > information from firmware, it merely implements the scaffolding for > integration of topology support in the architecture. > > No locking of the topology data is done since it is only modified during > CPU bringup with external serialisation from the SMP code. > > The goal is to separate the architecture hookup for providing topology > information from the DT parsing in order to ease review and avoid > blocking the architecture code (which will be built on by other work) > with the DT code review by providing something simple and basic. > > A following patch will implement support for parsing the DT topology > bindings for ARM, similar patches will be needed for ACPI. > > Signed-off-by: Mark Brown I have been clobbering the code with some random dts configs, running on top of the patch attached (to make code compliant with default if DT info is missing for some CPUs). Can you give it a go please and run your tests against it (I have just put it together) ? It should simplify things, thoughts ? AFAIK it should be correct, at least the info required by the scheduler is reset to default (include/linux/topology.h) if DT nodes are misconfigured. It applies on top of your series. Thanks, Lorenzo -- >8 -- Subject: [PATCH] arm64: kernel: update topology discovery code If the device tree does not contain topology information for a CPU, kernel code should set-up topology information for the CPU according to the default values defined in Documentation/cputopology.txt. Signed-off-by: Lorenzo Pieralisi --- arch/arm64/kernel/topology.c | 34 +++++++++++++--------------------- 1 files changed, 13 insertions(+), 21 deletions(-) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index e85560a..22ce390 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -317,6 +317,18 @@ static void update_siblings_masks(unsigned int cpuid) struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; int cpu; + if (cpuid_topo->cluster_id == -1) { + /* + * DT does not contain topology information for this cpu + * reset it to default behaviour + */ + pr_warn("CPU%u: No topology information configured\n", cpuid); + cpuid_topo->core_id = 0; + cpumask_set_cpu(cpuid, &cpuid_topo->core_sibling); + cpumask_set_cpu(cpuid, &cpuid_topo->thread_sibling); + return; + } + /* update core and thread sibling masks */ for_each_possible_cpu(cpu) { cpu_topo = &cpu_topology[cpu]; @@ -339,14 +351,7 @@ static void update_siblings_masks(unsigned int cpuid) void store_cpu_topology(unsigned int cpuid) { - struct cpu_topology *cpuid_topo = &cpu_topology[cpuid]; - - /* Something should have picked a topology by the time we get here */ - if (cpuid_topo->core_id == -1) - pr_warn("CPU%u: No topology information configured\n", cpuid); - else - update_siblings_masks(cpuid); - + update_siblings_masks(cpuid); update_cpu_power(cpuid); } @@ -372,17 +377,4 @@ void __init init_cpu_topology(void) } parse_dt_topology(); - - /* - * Assign all remaining CPUs to a cluster so the scheduler - * doesn't get confused. - */ - for_each_possible_cpu(cpu) { - struct cpu_topology *cpu_topo = &cpu_topology[cpu]; - - if (cpu_topo->cluster_id == -1) { - cpu_topo->cluster_id = INT_MAX; - cpu_topo->core_id = cpu; - } - } }