From patchwork Mon Dec 9 09:40:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: panchaxari X-Patchwork-Id: 22170 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f70.google.com (mail-oa0-f70.google.com [209.85.219.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 6F99923908 for ; Mon, 9 Dec 2013 09:41:22 +0000 (UTC) Received: by mail-oa0-f70.google.com with SMTP id m1sf13581655oag.9 for ; Mon, 09 Dec 2013 01:41:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=y03S92Q26pzqBQEfuicOaeqi3SZ9ydbRvchr0Dz2EHU=; b=EL/8VI7dzcRr0gYtFmu/cX9Hh2+jMBRLLUdMFMLGTIsHlVikEwNY7pkoZW9NIHEK7M JS4AE2YZADuIKznE0Md8v5/Jr9e+WIJbJuptHM2Ug96CGbA4IVrKDgYtMU22nIu9Zp34 w1/LgoEajcsD7La9pqUHml6tze+IvCqj1UDOS2Iow+BC8dOIeIbccfVIBn93bA5kBJj7 vUI0YFKJ+iFtTxbVGBG0BoFxOguz/e8u3mVFvyGRDJeYaUGIsaqrMZGX2Ug2QXVjqZWM oF75Nrd1NvlI9Z6IrAVCm5/P6a2m2o7hoWUMimKj1FVZI0d5LFJfK4jr3Hg94s7BQDO0 krIA== X-Gm-Message-State: ALoCoQm+9RV+Vjb1y/VNNCyNa+gSgDvrlLnQcWv1el9nf9cg+hUtPx1CamO4v8TetniYoXsiZnQ1 X-Received: by 10.182.246.39 with SMTP id xt7mr521736obc.40.1386582081317; Mon, 09 Dec 2013 01:41:21 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.0.106 with SMTP id 10ls2007675qed.55.gmail; Mon, 09 Dec 2013 01:41:21 -0800 (PST) X-Received: by 10.52.231.130 with SMTP id tg2mr8874096vdc.16.1386582081109; Mon, 09 Dec 2013 01:41:21 -0800 (PST) Received: from mail-vc0-f169.google.com (mail-vc0-f169.google.com [209.85.220.169]) by mx.google.com with ESMTPS id e3si3640716vek.55.2013.12.09.01.41.21 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 09 Dec 2013 01:41:21 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.169; Received: by mail-vc0-f169.google.com with SMTP id hu19so3245167vcb.28 for ; Mon, 09 Dec 2013 01:41:21 -0800 (PST) X-Received: by 10.53.2.36 with SMTP id bl4mr1085497vdd.32.1386582080982; Mon, 09 Dec 2013 01:41:20 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp92623vcz; Mon, 9 Dec 2013 01:41:20 -0800 (PST) X-Received: by 10.68.209.232 with SMTP id mp8mr19641683pbc.129.1386582079342; Mon, 09 Dec 2013 01:41:19 -0800 (PST) Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by mx.google.com with ESMTPS id w3si6758601pbh.239.2013.12.09.01.41.18 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 09 Dec 2013 01:41:19 -0800 (PST) Received-SPF: neutral (google.com: 209.85.192.175 is neither permitted nor denied by best guess record for domain of panchaxari.prasannamurthy@linaro.org) client-ip=209.85.192.175; Received: by mail-pd0-f175.google.com with SMTP id w10so4909296pde.20 for ; Mon, 09 Dec 2013 01:41:18 -0800 (PST) X-Received: by 10.68.217.194 with SMTP id pa2mr19595331pbc.1.1386582078840; Mon, 09 Dec 2013 01:41:18 -0800 (PST) Received: from si-panchaxari.LGE.NET ([203.247.149.152]) by mx.google.com with ESMTPSA id oj6sm23243162pab.9.2013.12.09.01.41.12 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 09 Dec 2013 01:41:18 -0800 (PST) From: panchaxari To: linus.walleij@linaro.org Cc: patches@linaro.org, linaro-kernel@lists.linaro.org, panchaxari.prasannamurthy@linaro.org, David Brown , Daniel Walker , Bryan Huntsman , Russell King , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH CFT] ARM:MSM: Enable ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR default Date: Mon, 9 Dec 2013 15:10:50 +0530 Message-Id: <1386582050-21375-1-git-send-email-panchaxari.prasannamurthy@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: panchaxari.prasannamurthy@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR have been enabled as default configs to MSM platform Introduction of PHYS_VIRT config as default would enable phy-to-virt and virt-to-phy translation function at boot and module loading time and enforce dynamic reallocation of memory. AUTO_ZRELADDR config would enable calculation of kernel load address at run time. PHYS_VIRT config is mutually exclusive to XIP_KERNEL, XIP_KERNEL is used in systems with NOR flash devices, and ZRELADDR config is mutually exclusive to ZBOOT_ROM. CFT::Call For Testing Requesting maintainers of MSM platforms to evaluate the changes on the board and comment, as I dont have the board for testing and also requesting an ACK Signed-off-by: panchaxari Cc: David Brown Cc: Daniel Walker Cc: Bryan Huntsman Cc: Russell King Cc: Linus Walleij Cc: linux-arm-msm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Tested-by: Courtney Cavin --- ARCH_MSM supports for Qualcomm MSM/QSD based systems. This runs on the apps processor of the MSM/QSD and depends on a shared memory interface to the modem processor which runs the baseband stack and controls some vital subsystems like clock and power control. Snapdragon is based on ARMv7 instruction set. And supports Random memory devices like DDR1, LPDDR2 and LPDDR3. And storage memory devices like NAND, eMMC. Below lkml link is a quoting by Russell which clears the concept of PHYS_VIRT and ZRELADDR --------------------------------------------------- https://lkml.org/lkml/2011/10/14/434 ------------------------------------------------- --- arch/arm/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 13621ed..3b77864 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -638,6 +638,8 @@ config ARCH_PXA config ARCH_MSM bool "Qualcomm MSM" select ARCH_REQUIRE_GPIOLIB + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR select CLKSRC_OF if OF select COMMON_CLK select GENERIC_CLOCKEVENTS