From patchwork Wed Nov 27 15:19:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taras Kondratiuk X-Patchwork-Id: 21812 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vb0-f71.google.com (mail-vb0-f71.google.com [209.85.212.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 51E9123FD2 for ; Wed, 27 Nov 2013 15:19:57 +0000 (UTC) Received: by mail-vb0-f71.google.com with SMTP id w8sf15953728vbj.10 for ; Wed, 27 Nov 2013 07:19:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=OW+9EHq28kxunbwT6a9UODbK1lnAmTxUPTmm9RNAzYg=; b=RLRtU5vUF0a9Olt+QWABSGw7hd1H9BRCarr+jFV8v7IfYC/l+CFTzFBTjSNbjnOFX8 UiqfZx0PRyqYikyAEjWYTCMQDYAF6FQdIDIJq2dGAX2LnBujykXYqwdAyW/aryhmuOOd ICs+1bpCyv+/FP3yxHxStIef7P5QWT+aspSKvP4dqriDxARDYVTRhRGIAoTfWc8Q5Lhu dh0H62CO95bC2fszILDh0BaWDrU8Mm7nuS8+t/bJ0rpiWtH7ePNpVyDRgMsOPardRNDj EYP26inErYq+U++hSLu69w8d30gNfN4nfnz6DGCFZqOkRQiOnnJYMHZPrRrWBO0p5VJO styA== X-Gm-Message-State: ALoCoQnXGQxz+k6UZX1PiRgu40ycNQg+YiVSUaUDGRxUE5t6RVRsrXSdA7h6OdDI1txQEDTEwDxg X-Received: by 10.236.206.15 with SMTP id k15mr14630915yho.35.1385565596831; Wed, 27 Nov 2013 07:19:56 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.37.134 with SMTP id y6ls3152250qej.15.gmail; Wed, 27 Nov 2013 07:19:56 -0800 (PST) X-Received: by 10.52.230.202 with SMTP id ta10mr655773vdc.41.1385565596709; Wed, 27 Nov 2013 07:19:56 -0800 (PST) Received: from mail-vc0-f177.google.com (mail-vc0-f177.google.com [209.85.220.177]) by mx.google.com with ESMTPS id wp10si21200763vdb.58.2013.11.27.07.19.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 27 Nov 2013 07:19:56 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.177; Received: by mail-vc0-f177.google.com with SMTP id hv10so4845778vcb.8 for ; Wed, 27 Nov 2013 07:19:56 -0800 (PST) X-Received: by 10.220.97.69 with SMTP id k5mr56726vcn.45.1385565596564; Wed, 27 Nov 2013 07:19:56 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp293058vcz; Wed, 27 Nov 2013 07:19:56 -0800 (PST) X-Received: by 10.152.116.109 with SMTP id jv13mr1980909lab.30.1385565595251; Wed, 27 Nov 2013 07:19:55 -0800 (PST) Received: from mail-lb0-f181.google.com (mail-lb0-f181.google.com [209.85.217.181]) by mx.google.com with ESMTPS id yf5si11747867lab.137.2013.11.27.07.19.52 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 27 Nov 2013 07:19:53 -0800 (PST) Received-SPF: neutral (google.com: 209.85.217.181 is neither permitted nor denied by best guess record for domain of taras.kondratiuk@linaro.org) client-ip=209.85.217.181; Received: by mail-lb0-f181.google.com with SMTP id q8so5553128lbi.12 for ; Wed, 27 Nov 2013 07:19:52 -0800 (PST) X-Received: by 10.112.53.97 with SMTP id a1mr1865054lbp.38.1385565592722; Wed, 27 Nov 2013 07:19:52 -0800 (PST) Received: from condor-x220.synapse.com ([195.238.93.36]) by mx.google.com with ESMTPSA id i8sm15507475lbh.2.2013.11.27.07.19.50 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 27 Nov 2013 07:19:51 -0800 (PST) From: Taras Kondratiuk To: Rob Herring Cc: patches@linaro.org, linaro-networking@linaro.org, linaro-kernel@lists.linaro.org, Russell King , Tony Lindgren , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH v2] ARM: OMAP4/highbank: Flush L2 cache before disabling Date: Wed, 27 Nov 2013 17:19:44 +0200 Message-Id: <1385565585-28306-1-git-send-email-taras.kondratiuk@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: taras.kondratiuk@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Kexec disables outer cache before jumping to reboot code, but it doesn't flush it explicitly. Flush is done implicitly inside of l2x0_disable(). But some SoC's override default .disable handler and don't flush cache. This may lead to a corrupted memory during Kexec reboot on these platforms. This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable() handlers to make it consistent with default l2x0_disable(). Acked-by: Rob Herring Acked-by: Santosh Shilimkar Acked-by: Tony Lindgren Signed-off-by: Taras Kondratiuk --- I was not aware about Russell's patch tracker process, so this patch was not hooked there. Highbank moved to PSCI since then, so patch has to be slightly modified. Rob, are you still ok with this patch? v1..v2: Removed changes in highbank_suspend_finish since after commit dd68eb0 "ARM: highbank: adapt to use ARM PSCI calls" cache is not explicitly disabled there. v1: http://www.spinics.net/lists/linux-omap/msg98318.html RFC v2: https://patchwork.kernel.org/patch/2990231/ Make the fix specific to platforms that don't use l2x0_disable(). RFC v1: https://patchwork.kernel.org/patch/2974431/ Based on v3.13-rc1 --- arch/arm/mach-highbank/highbank.c | 1 + arch/arm/mach-omap2/omap4-common.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index b3d7e56..ae17150 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -50,6 +50,7 @@ static void __init highbank_scu_map_io(void) static void highbank_l2x0_disable(void) { + outer_flush_all(); /* Disable PL310 L2 Cache controller */ highbank_smc1(0x102, 0x0); } diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index b39efd4..c0ab9b2 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -162,6 +162,7 @@ void __iomem *omap4_get_l2cache_base(void) static void omap4_l2x0_disable(void) { + outer_flush_all(); /* Disable PL310 L2 Cache controller */ omap_smc1(0x102, 0x0); }