From patchwork Tue Oct 17 13:05:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella Netto X-Patchwork-Id: 734390 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp469388wro; Tue, 17 Oct 2023 06:08:02 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGu+xbY1AtCwjteqarE0dcGf356Q9Mlv+A9rvRp6qER29tRyW0lU+Zwi/jjOfmVEKU7yzvX X-Received: by 2002:a05:6871:d06:b0:1e9:b811:da13 with SMTP id vh6-20020a0568710d0600b001e9b811da13mr2032914oab.49.1697548082646; Tue, 17 Oct 2023 06:08:02 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1697548082; cv=pass; d=google.com; s=arc-20160816; b=TzKdIVG08HLp9UAIxu6o++tBBhKDbIO5tigaRPoGy05QbJhFcMajVZeO1K6jUvMs3r WwbPxjLjvIeVDJFF0KW6YYhCswGd5V1eNtS+tay7xxT1EVULSiu7rj3ZpjPho+NCJ4a7 SkfcjTZX8zvzOHMticclce29XhU1kv7OMfk2JWcFLHw1RJpa7ZFMOZyrMoU0MNJcSbnL hm8LuRuGp+QHcSOfaGIltoGS0xx1L+7cc/ttXyPI7qokq115mBeAgMuBblKKEC9uTD+a mNvFL+jHPbYPYaaPgX+QhZCWSJJTdsOZEblrtnq+wxbxi3mT7XIqzGcfxHXx6I6Y4HbU KSIg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=VoCK1LAADQnt8DI3M3Qwv7Oygt25rzGLf4EPWcuDe8I=; fh=+FUb54tScwW7D3lvWhZcQBi30wyNNn2DusdH7ahfqKk=; b=fljIRqLwNEi6VbMWFh6kauCAT+7Q3nvprJ/fc8Vc/LhEbxREd+ljCjTv9fu5GH2Owx LOTVwvLonBW3cgH2JBqsIwql2JMK/+D87w0ojcJ5zir9f7CAABnyYGwzvv2JnRzENFda VqX+lOB4YqVvrHqfzmW8gvXl7fhLqFQkBI2QofxNfl0I9gAyllwsdvcHNWRNqdzo8y61 3PxeKUHlfXi9dtQlHhdHsACFvm0nCMA3nuy1bH2SNFp7heIV8nyrkUiOk4vquRONwyMf QS9laGukdKXziZdi8Ewq25neHDtOSk5R223KlPiiHcE/vyUoNBZzYfsKkqse6tQ9mH3d Zl2A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=txIqsAoI; arc=pass (i=1); spf=pass (google.com: domain of libc-alpha-bounces+patch=linaro.org@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="libc-alpha-bounces+patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id f19-20020ab02e93000000b007b5f2d0a4d4si133702uaa.85.2023.10.17.06.08.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 06:08:02 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-bounces+patch=linaro.org@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=txIqsAoI; arc=pass (i=1); spf=pass (google.com: domain of libc-alpha-bounces+patch=linaro.org@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="libc-alpha-bounces+patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0E7D23875DF0 for ; Tue, 17 Oct 2023 13:07:44 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by sourceware.org (Postfix) with ESMTPS id ADB91385CC96 for ; Tue, 17 Oct 2023 13:06:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org ADB91385CC96 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org ADB91385CC96 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::52b ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697547997; cv=none; b=uuCyjzcwxwOJFpt1QX39ODgbNIO0T/t5AHXEozgenmNZfcUT8Ia024OOuqbnXvCukjfmDwAuEb7nVrnfymB8fXzqWlWn4VWjSOi8OorzAhCMo+Cio0r37MQe97o91xQV5JziL7XyPkYAT9sZ8RFr/Ih0GLWaZIdpjXLzfWNRV80= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697547997; c=relaxed/simple; bh=1JUX1NmGWiTV72o9QrO5DdqPGwOxbwUqdkJw2IZLh0A=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=Iz2g43rDLnFK7sHZ5AEwImVAx8ymz3emnxvBGg8B8NqQ5Sqwt/HsFSXmoUqC68cU4Tdoe+jp+/o2+UFreczZ3BXkA+Vi45LR9Zzoq73Kv6bHqjTVrO2IQM/jFplH0iG4YTuQRMNWmM+6P/oB8r3Z1PeGz9Qvtv37NBcRkuI5OAU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pg1-x52b.google.com with SMTP id 41be03b00d2f7-577e62e2adfso3557499a12.2 for ; Tue, 17 Oct 2023 06:06:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697547994; x=1698152794; darn=sourceware.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=VoCK1LAADQnt8DI3M3Qwv7Oygt25rzGLf4EPWcuDe8I=; b=txIqsAoIWiu474kcbZGCaBqBLW4k0CVJSGLiriCfZf+2lbnmSQUYNc/i4gl8vIH6++ aHC4UuuIn6shlgMv2NuK4JJewKQRlPQQ36lwcWdE+EpzRchak0XkNnON2rtSYnif4qic 4zoDHbAEohC8KIeml18MNOBcbmF5zNnTDdVyLKtxjZQbolJMw4b77w2xHbfe2756Icbr ywaA/7EkQaCCjFbU6XrsMRS9DrdpruOfCG6UQ672GOsbHqBSCqX7QGa7ZVBS2fMNn/or yLBXgZRlUyX1/XW4K7BdBW2DAWkWQq6ieexBe+JGva7SjuTnvPY5WD32xtGSy8HCu4Hx G+pg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697547994; x=1698152794; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VoCK1LAADQnt8DI3M3Qwv7Oygt25rzGLf4EPWcuDe8I=; b=r4U7SMqHc7ONjwMCEb24jGu5G9nPTPEd5TPbWbmu/EkShHQxjV/0fyk7BTpN1tE+V5 Di2qcruSOQy2jDsUBstKwy+vvXRvQOHHj25bi7txwN6kPymTTOo8jbRIBA1vWkmyVNh3 xhk0mzDPcakgyMn05gVNqkCzr5fQgp6SUCh6jyiazmyYX/FKBQNenvygB1mkhIdNyMDk gfvvJAzHreEetCUNUUnpf0oxP//sI4FNEB2GHpq1ZqMVWpLgAdCvz4pHzxiLU46yJcBW zAmk40nw9UjMPiLaTAI74pKs+dri+94fhG5lDn2Wn+ARP0LInPUgp2DO3Vu3z0K1p1XE yeNw== X-Gm-Message-State: AOJu0Yy0C74pj8KWDsjtHhGRlFCJ+UsDQ3t/4MHjNQclG9Nj0ltC1EUv rlXrXTQZn9ymb8Hk+IkYUJvcA68AH0NBjGrXsrCAqQ== X-Received: by 2002:a05:6a21:7983:b0:15f:16f5:858e with SMTP id bh3-20020a056a21798300b0015f16f5858emr1736396pzc.58.1697547994092; Tue, 17 Oct 2023 06:06:34 -0700 (PDT) Received: from mandiga.. ([2804:1b3:a7c3:7f2e:11d:92b4:4d78:4197]) by smtp.gmail.com with ESMTPSA id l28-20020a635b5c000000b0056b6d1ac949sm1309788pgm.13.2023.10.17.06.06.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 06:06:33 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org, Siddhesh Poyarekar Subject: [PATCH v2 10/19] s390: Use dl-symbol-redir-ifunc.h on cpu-tunables Date: Tue, 17 Oct 2023 10:05:17 -0300 Message-Id: <20231017130526.2216827-11-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231017130526.2216827-1-adhemerval.zanella@linaro.org> References: <20231017130526.2216827-1-adhemerval.zanella@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patch=linaro.org@sourceware.org Using the memcmp symbol directly allows the compile to inline the memcmp calls (especially because _dl_tunable_set_hwcaps uses constants values), generating better code. Checked with tst-tunables on s390x-linux-gnu (qemu system). Reviewed-by: Siddhesh Poyarekar --- sysdeps/s390/cpu-features.c | 30 +++++++++---------- .../s390/multiarch/dl-symbol-redir-ifunc.h | 2 ++ 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/sysdeps/s390/cpu-features.c b/sysdeps/s390/cpu-features.c index 39f8c23a60..55449ba07f 100644 --- a/sysdeps/s390/cpu-features.c +++ b/sysdeps/s390/cpu-features.c @@ -21,7 +21,7 @@ #include #include #include -extern __typeof (memcmp) MEMCMP_DEFAULT; +#include #define S390_COPY_CPU_FEATURES(SRC_PTR, DEST_PTR) \ (DEST_PTR)->hwcap = (SRC_PTR)->hwcap; \ @@ -89,9 +89,9 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) if ((*feature == 'z' || *feature == 'a')) { if ((feature_len == 5 && *feature == 'z' - && MEMCMP_DEFAULT (feature, "zEC12", 5) == 0) + && memcmp (feature, "zEC12", 5) == 0) || (feature_len == 6 && *feature == 'a' - && MEMCMP_DEFAULT (feature, "arch10", 6) == 0)) + && memcmp (feature, "arch10", 6) == 0)) { reset_features = true; disable = true; @@ -100,9 +100,9 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3; } else if ((feature_len == 3 && *feature == 'z' - && MEMCMP_DEFAULT (feature, "z13", 3) == 0) + && memcmp (feature, "z13", 3) == 0) || (feature_len == 6 && *feature == 'a' - && MEMCMP_DEFAULT (feature, "arch11", 6) == 0)) + && memcmp (feature, "arch11", 6) == 0)) { reset_features = true; disable = true; @@ -110,9 +110,9 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3; } else if ((feature_len == 3 && *feature == 'z' - && MEMCMP_DEFAULT (feature, "z14", 3) == 0) + && memcmp (feature, "z14", 3) == 0) || (feature_len == 6 && *feature == 'a' - && MEMCMP_DEFAULT (feature, "arch12", 6) == 0)) + && memcmp (feature, "arch12", 6) == 0)) { reset_features = true; disable = true; @@ -120,11 +120,11 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3; } else if ((feature_len == 3 && *feature == 'z' - && (MEMCMP_DEFAULT (feature, "z15", 3) == 0 - || MEMCMP_DEFAULT (feature, "z16", 3) == 0)) + && (memcmp (feature, "z15", 3) == 0 + || memcmp (feature, "z16", 3) == 0)) || (feature_len == 6 - && (MEMCMP_DEFAULT (feature, "arch13", 6) == 0 - || MEMCMP_DEFAULT (feature, "arch14", 6) == 0))) + && (memcmp (feature, "arch13", 6) == 0 + || memcmp (feature, "arch14", 6) == 0))) { /* For z15 or newer we don't have to disable something, but we have to reset to the original values. */ @@ -134,14 +134,14 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) else if (*feature == 'H') { if (feature_len == 15 - && MEMCMP_DEFAULT (feature, "HWCAP_S390_VXRS", 15) == 0) + && memcmp (feature, "HWCAP_S390_VXRS", 15) == 0) { hwcap_mask = HWCAP_S390_VXRS; if (disable) hwcap_mask |= HWCAP_S390_VXRS_EXT | HWCAP_S390_VXRS_EXT2; } else if (feature_len == 19 - && MEMCMP_DEFAULT (feature, "HWCAP_S390_VXRS_EXT", 19) == 0) + && memcmp (feature, "HWCAP_S390_VXRS_EXT", 19) == 0) { hwcap_mask = HWCAP_S390_VXRS_EXT; if (disable) @@ -150,7 +150,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) hwcap_mask |= HWCAP_S390_VXRS; } else if (feature_len == 20 - && MEMCMP_DEFAULT (feature, "HWCAP_S390_VXRS_EXT2", 20) == 0) + && memcmp (feature, "HWCAP_S390_VXRS_EXT2", 20) == 0) { hwcap_mask = HWCAP_S390_VXRS_EXT2; if (!disable) @@ -160,7 +160,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) else if (*feature == 'S') { if (feature_len == 10 - && MEMCMP_DEFAULT (feature, "STFLE_MIE3", 10) == 0) + && memcmp (feature, "STFLE_MIE3", 10) == 0) { stfle_bits0_mask = S390_STFLE_MASK_ARCH13_MIE3; } diff --git a/sysdeps/s390/multiarch/dl-symbol-redir-ifunc.h b/sysdeps/s390/multiarch/dl-symbol-redir-ifunc.h index aa084fdcde..0f58897c48 100644 --- a/sysdeps/s390/multiarch/dl-symbol-redir-ifunc.h +++ b/sysdeps/s390/multiarch/dl-symbol-redir-ifunc.h @@ -20,10 +20,12 @@ #define _DL_IFUNC_GENERIC_H #include +#include #define IFUNC_SYMBOL_STR1(s) #s #define IFUNC_SYMBOL_STR(s) IFUNC_SYMBOL_STR1(s) asm ("memset = " IFUNC_SYMBOL_STR(MEMSET_DEFAULT)); +asm ("memcmp = " IFUNC_SYMBOL_STR(MEMCMP_DEFAULT)); #endif