From patchwork Tue Apr 1 11:32:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Newton X-Patchwork-Id: 27529 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vc0-f200.google.com (mail-vc0-f200.google.com [209.85.220.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 5EC8220341 for ; Tue, 1 Apr 2014 11:33:09 +0000 (UTC) Received: by mail-vc0-f200.google.com with SMTP id lg15sf22855973vcb.11 for ; Tue, 01 Apr 2014 04:33:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:mailing-list :precedence:list-id:list-unsubscribe:list-subscribe:list-archive :list-post:list-help:sender:delivered-to:from:to:subject:date :message-id:x-original-sender:x-original-authentication-results; bh=KSGVkQTZi01cszf1+DPZSlsLrCwxA/fp/fd2fsxhgXo=; b=T6PJeZrX8PmjLm9gb9515ZYr7Hbbn5HLB13izQTIHFfySOVp50YyPE5Vh4CZYVWmVl 3OC1sV3maFJ54WhfL4lR56lZ+u2t3tRadwYe3Cc23skclpV0wadkzeft6Ab7fvD1lg5h x/5jl6X2kUqmrcIYjYXChqZW5xspLcfKcQA9I1xszzAEGVZJbk8KhJj1SRf7a8g8c3vk D8bBhIhj2KEtJGZAlghfQLcJNNq5wDl+QnGpC0z37ZCyEkUsc7FuvejwclTe/GxcecZo HHc7AWgwuQK8/sMn7gcQAuN1HJv16gztB+OmrAlKgP2Igr+PXYmL8osl+otyOEA54Ymj /yJw== X-Gm-Message-State: ALoCoQm8Fi0z9dIl9og6PhkXmO50okcM/49eVK3BGfpe+V7l7DX4gFwDnEQtcUSqXfPvMCqu9PR0 X-Received: by 10.236.141.11 with SMTP id f11mr12535904yhj.54.1396351989031; Tue, 01 Apr 2014 04:33:09 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.97.8 with SMTP id l8ls391610qge.27.gmail; Tue, 01 Apr 2014 04:33:08 -0700 (PDT) X-Received: by 10.220.48.194 with SMTP id s2mr4899vcf.43.1396351988879; Tue, 01 Apr 2014 04:33:08 -0700 (PDT) Received: from mail-vc0-x22e.google.com (mail-vc0-x22e.google.com [2607:f8b0:400c:c03::22e]) by mx.google.com with ESMTPS id kj3si3556794vdb.15.2014.04.01.04.33.08 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 01 Apr 2014 04:33:08 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c03::22e is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c03::22e; Received: by mail-vc0-f174.google.com with SMTP id ld13so9548978vcb.33 for ; Tue, 01 Apr 2014 04:33:08 -0700 (PDT) X-Received: by 10.52.171.115 with SMTP id at19mr16359vdc.48.1396351988717; Tue, 01 Apr 2014 04:33:08 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.12.8 with SMTP id v8csp228287vcv; Tue, 1 Apr 2014 04:33:08 -0700 (PDT) X-Received: by 10.68.4.232 with SMTP id n8mr14532183pbn.114.1396351987890; Tue, 01 Apr 2014 04:33:07 -0700 (PDT) Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id wm7si11052157pab.192.2014.04.01.04.33.07 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Apr 2014 04:33:07 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-48769-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 4865 invoked by alias); 1 Apr 2014 11:32:58 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Subscribe: List-Archive: List-Post: , List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 4852 invoked by uid 89); 1 Apr 2014 11:32:57 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.2 required=5.0 tests=AWL, BAYES_50, KAM_STOCKGEN, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-wg0-f52.google.com X-Received: by 10.194.2.145 with SMTP id 17mr13290361wju.60.1396351972555; Tue, 01 Apr 2014 04:32:52 -0700 (PDT) From: Will Newton To: libc-alpha@sourceware.org Subject: [PATCH v2 1/3] aarch64: Re-implement setcontext without rt_sigreturn syscall Date: Tue, 1 Apr 2014 12:32:45 +0100 Message-Id: <1396351967-1952-1-git-send-email-will.newton@linaro.org> X-Original-Sender: will.newton@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c03::22e is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@sourceware.org X-Google-Group-Id: 836684582541 The current implementation of setcontext uses rt_sigreturn to restore the contents of registers. This contrasts with the way most other architectures implement setcontext: powerpc64, mips, tile: Call rt_sigreturn if context was created by a call to a signal handler, otherwise restore in user code. powerpc32: Call swapcontext system call and don't call sigreturn or rt_sigreturn. x86_64, sparc, hppa, sh, ia64, m68k, s390, arm: Only support restoring "synchronous" contexts, that is contexts created by getcontext, and restoring in user code and don't call sigreturn or rt_sigreturn. alpha: Call sigreturn (but not rt_sigreturn) in all cases to do the restore. The text of the setcontext manpage suggests that the requirement to be able to restore a signal handler created context has been dropped from SUSv2: If the context was obtained by a call to a signal handler, then old standard text says that "program execution continues with the program instruction following the instruction interrupted by the signal". However, this sentence was removed in SUSv2, and the present verdict is "the result is unspecified". Implementing setcontext by calling rt_sigreturn unconditionally causes problems when used with sigaltstack as in BZ #16629. On this basis it seems that aarch64 is broken and that new ports should only support restoring contexts created with getcontext and do not need to call rt_sigreturn at all. This patch re-implements the aarch64 setcontext function to restore the context in user code in a similar manner to x86_64 and other ports. ChangeLog: 2014-04-01 Will Newton [BZ #16629] * sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Re-implement to restore registers in user code and avoid rt_sigreturn system call. --- NEWS | 6 +- sysdeps/unix/sysv/linux/aarch64/setcontext.S | 147 +++++++++++++++++---------- 2 files changed, 95 insertions(+), 58 deletions(-) Changes in v2: - Added NEWS entry - Fixed bug in handling sigmask value - Improved commit message diff --git a/NEWS b/NEWS index 1574ab4..219198d 100644 --- a/NEWS +++ b/NEWS @@ -11,9 +11,9 @@ Version 2.20 6804, 15347, 15804, 15894, 16002, 16198, 16284, 16348, 16349, 16357, 16362, 16447, 16532, 16545, 16574, 16599, 16600, 16609, 16610, 16611, - 16613, 16623, 16632, 16634, 16639, 16642, 16648, 16649, 16670, 16674, - 16677, 16680, 16683, 16689, 16695, 16701, 16706, 16707, 16712, 16713, - 16714, 16731, 16743, 16758, 16759, 16760, 16770. + 16613, 16623, 16629, 16632, 16634, 16639, 16642, 16648, 16649, 16670, + 16674, 16677, 16680, 16683, 16689, 16695, 16701, 16706, 16707, 16712, + 16713, 16714, 16731, 16743, 16758, 16759, 16760, 16770. * Running the testsuite no longer terminates as soon as a test fails. Instead, a file tests.sum (xtests.sum from "make xcheck") is generated, diff --git a/sysdeps/unix/sysv/linux/aarch64/setcontext.S b/sysdeps/unix/sysv/linux/aarch64/setcontext.S index d220c41..aef5149 100644 --- a/sysdeps/unix/sysv/linux/aarch64/setcontext.S +++ b/sysdeps/unix/sysv/linux/aarch64/setcontext.S @@ -22,68 +22,105 @@ #include "ucontext_i.h" #include "ucontext-internal.h" -/* int setcontext (const ucontext_t *ucp) */ +/* int __setcontext (const ucontext_t *ucp) - .text - -ENTRY(__setcontext) - - /* Create a signal frame on the stack: - - fp - lr - ... - sp-> rt_sigframe - */ - - stp x29, x30, [sp, -16]! - cfi_adjust_cfa_offset (16) - cfi_rel_offset (x29, 0) - cfi_rel_offset (x30, 8) - - mov x29, sp - cfi_def_cfa_register (x29) - - /* Allocate space for the sigcontext. */ - mov w3, #((RT_SIGFRAME_SIZE + SP_ALIGN_SIZE) & SP_ALIGN_MASK) - sub sp, sp, x3 + Restores the machine context in UCP and thereby resumes execution + in that context. - /* Compute the base address of the ucontext structure. */ - add x1, sp, #RT_SIGFRAME_UCONTEXT + This implementation is intended to be used for *synchronous* context + switches only. Therefore, it does not have to restore anything + other than the PRESERVED state. */ - /* Only ucontext is required in the frame, *copy* it in. */ - -#if UCONTEXT_SIZE % 16 -#error The implementation of setcontext.S assumes sizeof(ucontext_t) % 16 == 0 -#endif - - mov x2, #UCONTEXT_SIZE / 16 -0: - ldp x3, x4, [x0], #16 - stp x3, x4, [x1], #16 - sub x2, x2, 1 - cbnz x2, 0b + .text - /* rt_sigreturn () -- no arguments, sp points to struct rt_sigframe. */ - mov x8, SYS_ify (rt_sigreturn) +ENTRY (__setcontext) + /* Save a copy of UCP. */ + mov x9, x0 + + /* Set the signal mask with + rt_sigprocmask (SIG_SETMASK, mask, NULL, _NSIG/8). */ + mov x0, #SIG_SETMASK + add x1, x9, #UCONTEXT_SIGMASK + mov x2, #0 + mov x3, #_NSIG8 + mov x8, SYS_ify (rt_sigprocmask) svc 0 - - /* Ooops we failed. Recover the stack */ - - mov sp, x29 - cfi_def_cfa_register (sp) - - ldp x29, x30, [sp], 16 - cfi_adjust_cfa_offset (16) - cfi_restore (x29) - cfi_restore (x30) - b C_SYMBOL_NAME(__syscall_error) - + cbz x0, 1f + b C_SYMBOL_NAME (__syscall_error) +1: + /* Restore the general purpose registers. */ + mov x0, x9 + cfi_def_cfa (x0, 0) + cfi_offset (x18, oX0 + 18 * SZREG) + cfi_offset (x19, oX0 + 19 * SZREG) + cfi_offset (x20, oX0 + 20 * SZREG) + cfi_offset (x21, oX0 + 21 * SZREG) + cfi_offset (x22, oX0 + 22 * SZREG) + cfi_offset (x23, oX0 + 23 * SZREG) + cfi_offset (x24, oX0 + 24 * SZREG) + cfi_offset (x25, oX0 + 25 * SZREG) + cfi_offset (x26, oX0 + 26 * SZREG) + cfi_offset (x27, oX0 + 27 * SZREG) + cfi_offset (x28, oX0 + 28 * SZREG) + cfi_offset (x29, oX0 + 29 * SZREG) + cfi_offset (x30, oX0 + 30 * SZREG) + + cfi_offset ( d8, oV0 + 8 * SZVREG) + cfi_offset ( d9, oV0 + 9 * SZVREG) + cfi_offset (d10, oV0 + 10 * SZVREG) + cfi_offset (d11, oV0 + 11 * SZVREG) + cfi_offset (d12, oV0 + 12 * SZVREG) + cfi_offset (d13, oV0 + 13 * SZVREG) + cfi_offset (d14, oV0 + 14 * SZVREG) + cfi_offset (d15, oV0 + 15 * SZVREG) + ldp x18, x19, [x0, oX0 + 18 * SZREG] + ldp x20, x21, [x0, oX0 + 20 * SZREG] + ldp x22, x23, [x0, oX0 + 22 * SZREG] + ldp x24, x25, [x0, oX0 + 24 * SZREG] + ldp x26, x27, [x0, oX0 + 26 * SZREG] + ldp x28, x29, [x0, oX0 + 28 * SZREG] + ldr x30, [x0, oX0 + 30 * SZREG] + ldr x2, [x0, oSP] + mov sp, x2 + + /* Check for FP SIMD context. */ + add x2, x0, #oEXTENSION + + mov w3, #(FPSIMD_MAGIC & 0xffff) + movk w3, #(FPSIMD_MAGIC >> 16), lsl #16 + ldr w1, [x2, #oHEAD + oMAGIC] + cmp w1, w3 + b.ne 2f + + /* Restore the FP SIMD context. */ + add x3, x2, #oV0 + 8 * SZVREG + ldp d8, d9, [x3], #2 * SZVREG + ldp d10, d11, [x3], #2 * SZVREG + ldp d12, d13, [x3], #2 * SZVREG + ldp d14, d15, [x3], #2 * SZVREG + + add x3, x2, oFPSR + + ldr w4, [x3] + msr fpsr, x4 + + ldr w4, [x3, oFPCR - oFPSR] + msr fpcr, x4 + +2: + ldr x16, [x0, oPC] + /* Restore arg registers. */ + ldp x2, x3, [x0, oX0 + 2 * SZREG] + ldp x4, x5, [x0, oX0 + 4 * SZREG] + ldp x6, x7, [x0, oX0 + 6 * SZREG] + ldp x0, x1, [x0, oX0 + 0 * SZREG] + /* Jump to the new pc value. */ + br x16 PSEUDO_END (__setcontext) weak_alias (__setcontext, setcontext) -ENTRY(__startcontext) +ENTRY (__startcontext) mov x0, x19 cbnz x0, __setcontext -1: b HIDDEN_JUMPTARGET(_exit) -END(__startcontext) +1: b HIDDEN_JUMPTARGET (_exit) +END (__startcontext)