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bh=vtIx46M2ibNPxEsW7Rx8O7t8Ib66yk8bPZlcoFbfleA=; b=pA5CaB6kPEPyLeAyfCK2LKbxEOmfOTCxgyklt8iJYF4iU61rd9Mnus3dwomRoC+DvP s4cEy0r/DNi3vjBKN2ayj+6bWNFLTl46+U2l8cX6biXt6zzr9h5FapfR/rtoP66QmOUn /kOT5WaJNRskBTPmKN9aRc/TZ5LwtG1EskTwG+rGtfWdiTatUNpjGfpI5tTKuWlvJ0DT bX4IuadVqry2jTl4UB5ml9/1YUsiqb6NZOb824AvBssu99oZxbiDFmZpb2UMkV7zZB5n Llj6iIy17PtrLIF7iOf875A6CAQNvacNn54cNvnYTOrzMY6yQ2TFWg4KPLSaHGsiJ6d6 k1Hg== X-Gm-Message-State: AOJu0YwcLpAf530GEHrEC649i+ZKi3yoXGk1KtnPA/eGCvXkTtUkZUki E81xwXPTsR5g4YXMC7z/FpLXEZjbb/XrnR23K5dKOKWcrLXdSgruUulpQSKOLnQT2ynOPHm7Owy e X-Received: by 2002:a17:902:f693:b0:20b:7be8:8ecf with SMTP id d9443c01a7336-210c6c7f095mr313890405ad.53.1730516236630; Fri, 01 Nov 2024 19:57:16 -0700 (PDT) Received: from localhost ([2804:14d:7e39:8470:f214:b4dc:314a:c1ee]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e92fa25742sm5702491a91.19.2024.11.01.19.57.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Nov 2024 19:57:16 -0700 (PDT) From: Thiago Jung Bauermann To: gdb-patches@sourceware.org Subject: [RFC PATCH v4 12/15] GDB: aarch64-linux: Load and store VG separately from other SVE registers Date: Fri, 1 Nov 2024 23:56:32 -0300 Message-ID: <20241102025635.586759-13-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241102025635.586759-1-thiago.bauermann@linaro.org> References: <20241102025635.586759-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~patch=linaro.org@sourceware.org GDB currently loads and stores all SVE registers, including the VG register, at the same time. To suport variable-size SVE registers, GDB needs to be able to load and store VG separately from them so that it knows the size of the SVE vector registers in advance. So change it to fetch or store VG separately when only that register is requested. --- gdb/aarch64-linux-nat.c | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 0fa5bee500b1..f1b014b5eb26 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -310,6 +310,21 @@ store_fpregs_to_thread (const struct regcache *regcache) } } +/* Fill GDB's REGCACHE with the SVE VG register value from the thread + associated with REGCACHE. + + This function handles reading data from SVE or SSVE states, depending + on which state is active at the moment. */ + +static void +fetch_sve_vg_from_thread (struct regcache *regcache) +{ + uint64_t vq = aarch64_sve_get_vq (regcache->ptid ().lwp ()); + uint64_t vg = sve_vg_from_vq (vq); + + regcache->raw_supply (AARCH64_SVE_VG_REGNUM, &vg); +} + /* Fill GDB's REGCACHE with the valid SVE register values from the thread associated with REGCACHE. @@ -323,6 +338,19 @@ fetch_sveregs_from_thread (struct regcache *regcache) aarch64_sve_regs_copy_to_reg_buf (regcache->ptid ().lwp (), regcache); } +/* Store the SVE VG register value from GDB's REGCACHE to the thread + associated with REGCACHE. + + This function handles writing data to SVE or SSVE state, depending + on which state is active at the moment. */ + +static void +store_sve_vg_to_thread (struct regcache *regcache) +{ + if (!aarch64_sve_set_vq (regcache->ptid ().lwp (), regcache)) + perror_with_name (_ ("Unable to set VG register")); +} + /* Store the valid SVE register values from GDB's REGCACHE to the thread associated with REGCACHE. @@ -583,8 +611,10 @@ aarch64_fetch_registers (struct regcache *regcache, int regno) fetch_gregs_from_thread (regcache); /* SVE register? */ else if ((tdep->has_sve () || tdep->has_sme ()) - && regno <= AARCH64_SVE_VG_REGNUM) + && regno < AARCH64_SVE_VG_REGNUM) fetch_sveregs_from_thread (regcache); + else if (tdep->has_sve () && regno == AARCH64_SVE_VG_REGNUM) + fetch_sve_vg_from_thread (regcache); /* FPSIMD register? */ else if (regno <= AARCH64_FPCR_REGNUM) fetch_fpregs_from_thread (regcache); @@ -686,8 +716,10 @@ aarch64_store_registers (struct regcache *regcache, int regno) store_gregs_to_thread (regcache); /* SVE register? */ else if ((tdep->has_sve () || tdep->has_sme ()) - && regno <= AARCH64_SVE_VG_REGNUM) + && regno < AARCH64_SVE_VG_REGNUM) store_sveregs_to_thread (regcache); + else if (tdep->has_sve () && regno == AARCH64_SVE_VG_REGNUM) + store_sve_vg_to_thread (regcache); /* FPSIMD register? */ else if (regno <= AARCH64_FPCR_REGNUM) store_fpregs_to_thread (regcache);