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bh=1VfiQpZYlW8Jz9iznM6Lb0b8iBrF/nSrwHwBI9Xs9Do=; b=A4SX3XtiNXWhUX4VGGbZoGHSqSoOAJr9OapEi4oXGpmRc/2gJ9sx396NHctcC9TQ7Z 94fyXqaVnkQTY7JA9ikOmtWELoevCQwX/wp5hAHiiDFaLBPtX4rq4G+ZvAOqKm+vLB2A zzeWsnOPPeRjrECbLBHtPTo9yGR89YSUUeqpW3XHOcxc2TRngl+ZJV3Mw7ZdkalMzbYy i3uXVFvawiGzgvT253F8DjVX8RhpzXqZElG7OWmEJkV2cFlP9aG8CSaXz2uA5Hjsr4B5 AjwH+1QCBn3Jc/E/kQffNW9Ak5GblhTR+0W8vvklOy3HSDN4UbWGvwkUrHL1dVPL5SE/ ysLA== X-Gm-Message-State: AOJu0YwISgxlxuFUWZrOlephFZo18rkPGmf98DPoRrrlKNZUwik4KuBL vkYgFSFlqsq7J3W7ESzd8cf0qpEgNsq7tTQ55rklYd0TULRrwdtNR/6KrOvTvcTzVyhHN6mXRmp W X-Received: by 2002:a17:90a:af86:b0:2b5:91d1:3ae8 with SMTP id 98e67ed59e1d1-2b6c711009cmr2623785a91.14.1715318656119; Thu, 09 May 2024 22:24:16 -0700 (PDT) Received: from localhost ([2804:14d:7e39:8470:9d31:c7dc:c8bd:73d9]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2b67158c39dsm2380391a91.35.2024.05.09.22.24.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 May 2024 22:24:15 -0700 (PDT) From: Thiago Jung Bauermann To: gdb-patches@sourceware.org Cc: Christophe Lyon , Luis Machado Subject: [PATCH v3 1/5] gdb/aarch64: Disable displaced single-step for MOPS instructions Date: Fri, 10 May 2024 02:24:04 -0300 Message-ID: <20240510052408.2173579-2-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240510052408.2173579-1-thiago.bauermann@linaro.org> References: <20240510052408.2173579-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patch=linaro.org@sourceware.org The AArch64 MOPS (Memory Operation) instructions provide a standardised instruction sequence to perform a memset, memcpy or memmove. A sequence is always composed of three instructions: a prologue instruction, a main instruction and an epilogue instruction. As an illustration, here are the implementations of these memory operations in glibc 2.39: (gdb) disassemble/r Dump of assembler code for function __memset_mops: => 0x0000fffff7e8d780 <+0>: d503201f nop 0x0000fffff7e8d784 <+4>: aa0003e3 mov x3, x0 0x0000fffff7e8d788 <+8>: 19c10443 setp [x3]!, x2!, x1 0x0000fffff7e8d78c <+12>: 19c14443 setm [x3]!, x2!, x1 0x0000fffff7e8d790 <+16>: 19c18443 sete [x3]!, x2!, x1 0x0000fffff7e8d794 <+20>: d65f03c0 ret End of assembler dump. (gdb) disassemble/r Dump of assembler code for function __memcpy_mops: => 0x0000fffff7e8c580 <+0>: d503201f nop 0x0000fffff7e8c584 <+4>: aa0003e3 mov x3, x0 0x0000fffff7e8c588 <+8>: 19010443 cpyfp [x3]!, [x1]!, x2! 0x0000fffff7e8c58c <+12>: 19410443 cpyfm [x3]!, [x1]!, x2! 0x0000fffff7e8c590 <+16>: 19810443 cpyfe [x3]!, [x1]!, x2! 0x0000fffff7e8c594 <+20>: d65f03c0 ret End of assembler dump. (gdb) disassemble/r Dump of assembler code for function __memmove_mops: => 0x0000fffff7e8d180 <+0>: d503201f nop 0x0000fffff7e8d184 <+4>: aa0003e3 mov x3, x0 0x0000fffff7e8d188 <+8>: 1d010443 cpyp [x3]!, [x1]!, x2! 0x0000fffff7e8d18c <+12>: 1d410443 cpym [x3]!, [x1]!, x2! 0x0000fffff7e8d190 <+16>: 1d810443 cpye [x3]!, [x1]!, x2! 0x0000fffff7e8d194 <+20>: d65f03c0 ret End of assembler dump. The Arm Architecture Reference Manual says that "the prologue, main, and epilogue instructions are expected to be run in succession and to appear consecutively in memory". Therefore this patch disables displaced stepping on them. PR tdep/31666 Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31666 --- gdb/aarch64-tdep.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) Change in v3: - Remove aarch64_software_single_step_mops function and the change to call it from aarch64_software_single_step, since Luis clarified that it is in fact possible to single step through MOPS sequences. No change in v2. diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 8d0553f3d7cd..05ecd421cd0e 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3808,10 +3808,12 @@ aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch, if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0) return NULL; - /* Look for a Load Exclusive instruction which begins the sequence. */ - if (inst.opcode->iclass == ldstexcl && bit (insn, 22)) + /* Look for a Load Exclusive instruction which begins the sequence, + or for a MOPS instruction. */ + if ((inst.opcode->iclass == ldstexcl && bit (insn, 22)) + || AARCH64_CPU_HAS_FEATURE (*inst.opcode->avariant, MOPS)) { - /* We can't displaced step atomic sequences. */ + /* We can't displaced step atomic sequences nor MOPS instructions. */ return NULL; }