From patchwork Fri Oct 21 14:17:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rainer Orth X-Patchwork-Id: 78677 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp1325317qge; Fri, 21 Oct 2016 07:18:13 -0700 (PDT) X-Received: by 10.107.11.27 with SMTP id v27mr1203705ioi.179.1477059493913; Fri, 21 Oct 2016 07:18:13 -0700 (PDT) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id f2si2401398pad.343.2016.10.21.07.18.13 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 21 Oct 2016 07:18:13 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-439241-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-439241-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-439241-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; q=dns; s=default; b=dgUHYytMz5d+OYTVk040KB889m0vXhU0Pj1fgDyfEKPhor04+6 DGfaRNoOa4lnfjSwudA9NC73XB1iH68YKPpaaAUVKUSW7o6/wG/xG6G4owNa7ny/ qikZbxhoup2EaoPrMVy0sf0mNuHbNeupuba7GCNEIpK0e9J/viNuxlKpE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; s= default; bh=XQEpjP8Uv1gbiLgCgTvjkOue5LQ=; b=bbkPRJyh57VQJNy+4VM9 nPSZhtld8+Boue2+cX0zxMCzp+bVAu6KryTw57Dkeu/JKE8Kwa6G4X45Cv8uRjDQ r9u1TdhphC4/rWniXhHWhIzUvMCGoTLGfevWZ7xsGIUxhewiw131DeKaoE/NR1dN pQ6JrBPnEHbT9pHV5AU56ls= Received: (qmail 81213 invoked by alias); 21 Oct 2016 14:17:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 81203 invoked by uid 89); 21 Oct 2016 14:17:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.2 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=H*r:Sun, Bielefeld, bielefeld, ia32 X-HELO: smtp.CeBiTec.Uni-Bielefeld.DE Received: from smtp.CeBiTec.Uni-Bielefeld.DE (HELO smtp.CeBiTec.Uni-Bielefeld.DE) (129.70.160.84) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 21 Oct 2016 14:17:48 +0000 Received: from localhost (localhost.CeBiTec.Uni-Bielefeld.DE [127.0.0.1]) by smtp.CeBiTec.Uni-Bielefeld.DE (Postfix) with ESMTP id 51CBA3A9; Fri, 21 Oct 2016 16:17:45 +0200 (CEST) Received: from smtp.CeBiTec.Uni-Bielefeld.DE ([127.0.0.1]) by localhost (malfoy.CeBiTec.Uni-Bielefeld.DE [127.0.0.1]) (amavisd-new, port 10024) with LMTP id R+uXFeFyVJS3; Fri, 21 Oct 2016 16:17:42 +0200 (CEST) Received: from lokon.CeBiTec.Uni-Bielefeld.DE (lokon.CeBiTec.Uni-Bielefeld.DE [129.70.161.152]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.CeBiTec.Uni-Bielefeld.DE (Postfix) with ESMTPS id C83F03A8; Fri, 21 Oct 2016 16:17:41 +0200 (CEST) Received: (from ro@localhost) by lokon.CeBiTec.Uni-Bielefeld.DE (8.15.2+Sun/8.15.2/Submit) id u9LEHfJp011194; Fri, 21 Oct 2016 16:17:41 +0200 (MEST) From: Rainer Orth To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: [testsuite, i386] Work around 32-bit i386 STV testcases failing with -mstackrealign (PR target/77483) Date: Fri, 21 Oct 2016 16:17:41 +0200 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.1 (usg-unix-v) MIME-Version: 1.0 X-IsSubscribed: yes The following patch works around quite a number of i386 testcases FAILing on Solaris/x86, as reported in the PR. To avoid tons of testsuite noise, the following patch adds -mno-stackrealign to the affected testcases and will thus benefit other targets that default to -mstackrealign, too. Bootstrapped without regressions on i386-pc-solaris2.12 and x86_64-pc-linux-gnuu (both multilibs in each case). Ok for mainline and (eventually) the gcc-6 branch? Thanks. Rainer -- ----------------------------------------------------------------------------- Rainer Orth, Center for Biotechnology, Bielefeld University 2016-09-07 Rainer Orth PR target/77483 * gcc.target/i386/mask-unpack.c (dg-options): Add -mno-stackrealign. * gcc.target/i386/pr65105-1.c: Likewise. * gcc.target/i386/pr65105-2.c: Likewise. * gcc.target/i386/pr65105-3.c: Likewise. * gcc.target/i386/pr65105-5.c: Likewise. * gcc.target/i386/pr67761.c: Likewise. * gcc.target/i386/pr70799-1.c: Likewise. # HG changeset patch # Parent 3e7f3a609bf8231e3e4c8be3a1a84b62a02a1e1e Work around -mstackrealign disabled for 32-bit (PR target/77483) diff --git a/gcc/testsuite/gcc.target/i386/mask-unpack.c b/gcc/testsuite/gcc.target/i386/mask-unpack.c --- a/gcc/testsuite/gcc.target/i386/mask-unpack.c +++ b/gcc/testsuite/gcc.target/i386/mask-unpack.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx512bw -mavx512dq -O3 -fopenmp-simd -fdump-tree-vect-details" } */ +/* { dg-options "-mavx512bw -mavx512dq -mno-stackrealign -O3 -fopenmp-simd -fdump-tree-vect-details" } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 10 "vect" } } */ /* { dg-final { scan-assembler-not "maskmov" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65105-1.c b/gcc/testsuite/gcc.target/i386/pr65105-1.c --- a/gcc/testsuite/gcc.target/i386/pr65105-1.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-1.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do run { target { ia32 } } } */ -/* { dg-options "-O2 -msse2 -mtune=slm -save-temps" } */ +/* { dg-options "-O2 -msse2 -mtune=slm -mno-stackrealign -save-temps" } */ /* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "por" } } */ /* { dg-final { scan-assembler "pand" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65105-2.c b/gcc/testsuite/gcc.target/i386/pr65105-2.c --- a/gcc/testsuite/gcc.target/i386/pr65105-2.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-2.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -msse2" } */ +/* { dg-options "-O2 -msse2 -mno-stackrealign" } */ /* { dg-final { scan-assembler "por" } } */ long long i1, i2, res; diff --git a/gcc/testsuite/gcc.target/i386/pr65105-3.c b/gcc/testsuite/gcc.target/i386/pr65105-3.c --- a/gcc/testsuite/gcc.target/i386/pr65105-3.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-3.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=slm -msse4.2" } */ +/* { dg-options "-O2 -march=slm -msse4.2 -mno-stackrealign" } */ /* { dg-final { scan-assembler "pand" } } */ /* { dg-final { scan-assembler "por" } } */ /* { dg-final { scan-assembler "ptest" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65105-5.c b/gcc/testsuite/gcc.target/i386/pr65105-5.c --- a/gcc/testsuite/gcc.target/i386/pr65105-5.c +++ b/gcc/testsuite/gcc.target/i386/pr65105-5.c @@ -1,6 +1,6 @@ /* PR target/pr65105 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=core-avx2" } */ +/* { dg-options "-O2 -march=core-avx2 -mno-stackrealign" } */ /* { dg-final { scan-assembler "pandn" } } */ /* { dg-final { scan-assembler "pxor" } } */ /* { dg-final { scan-assembler "ptest" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67761.c b/gcc/testsuite/gcc.target/i386/pr67761.c --- a/gcc/testsuite/gcc.target/i386/pr67761.c +++ b/gcc/testsuite/gcc.target/i386/pr67761.c @@ -1,6 +1,6 @@ /* PR target/pr67761 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=slm -g" } */ +/* { dg-options "-O2 -march=slm -mno-stackrealign -g" } */ /* { dg-final { scan-assembler "paddq" } } */ void diff --git a/gcc/testsuite/gcc.target/i386/pr70799-1.c b/gcc/testsuite/gcc.target/i386/pr70799-1.c --- a/gcc/testsuite/gcc.target/i386/pr70799-1.c +++ b/gcc/testsuite/gcc.target/i386/pr70799-1.c @@ -1,6 +1,6 @@ /* PR target/pr70799 */ /* { dg-do compile { target { ia32 } } } */ -/* { dg-options "-O2 -march=slm" } */ +/* { dg-options "-O2 -march=slm -mno-stackrealign" } */ /* { dg-final { scan-assembler "pxor" } } */ /* { dg-final { scan-assembler "pcmpeqd" } } */ /* { dg-final { scan-assembler "movdqa\[ \\t\]+.?LC0" } } */