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[209.132.180.131]) by mx.google.com with ESMTPS id m12si3116241pli.207.2016.12.15.08.07.29 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Dec 2016 08:07:29 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-444521-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-444521-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-444521-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:references:message-id:date:mime-version:in-reply-to :content-type; q=dns; s=default; b=ROTSalXoh6S7dyKwVJ5oNUHUjFeEO pL9Vu/snr5nqLM2pKbLLpaLIlUHL8F8FdARzpHtRc2aIHiUpnIBTIVdxn0FadMZ5 3nmHFSJpPDkwqX0qBv+wGCChxDHYFD+ft64YVZWu6spWAHBieyS+P/02lm3zSr5s pygAdg6FtpHSf8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:references:message-id:date:mime-version:in-reply-to :content-type; s=default; bh=057/n93wrMQv1JACCi/jiSIvo70=; b=GSU nK3aZhnFa3KpyIErliun9I77KJ3h7YInHhUshvuY1filYBlLFArInbUrJ+64Yagx bk8AOgwj8Tp3+VEOt5fIZC6CFNNMvlQYtZgyct/ufk41blZGK4GCoQZ1xE7WsLpI pH3Cdv1PoCtOonb/XxQ4Fa4Nt57wt7qQMb7HJq20= Received: (qmail 33269 invoked by alias); 15 Dec 2016 16:06:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 33192 invoked by uid 89); 15 Dec 2016 16:06:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.0 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=UNKNOWN, sk:CODE_FO, sk:code_fo X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 15 Dec 2016 16:06:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 530841516; Thu, 15 Dec 2016 08:06:11 -0800 (PST) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D30043F445 for ; Thu, 15 Dec 2016 08:06:10 -0800 (PST) From: "Richard Earnshaw (lists)" Subject: [PATCH 07/21] [arm] Use arm_active_target when configuring builtins To: gcc-patches@gcc.gnu.org References: Message-ID: Date: Thu, 15 Dec 2016 16:06:09 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: This patch uses the new ISA data structure to determine which builtins to add. It entirely eliminates the need for insn_flags to be a global variable, but we're about to delete that in the following patches, so for now we leave it as a global. * arm-builtins.c: Include sbitmap.h. (def_mbuiltin): Change first parameter to a flag bit. Use it to test available features in the current target. (struct builtin_description): Change type of feature field. (IWMMXT_BUILTIN): Use the isa_features types. (IWMMXT2_BUILTIN): Likewise. (IWMMXT_BUILTIN2): Likewise. (IWMMXT2_BUILTIN2): Likewise. (CRC32_BUILTIN): Likewise. (CRYPTO_BUILTIN): Likewise. (iwmmx_builtin): Likewise. (iwmmx2_builtin): Likewise. (arm_iwmmxt_builtin): Check for specific feature bits. --- gcc/config/arm/arm-builtins.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 1444420..80d3b67 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -37,6 +37,7 @@ #include "expr.h" #include "langhooks.h" #include "case-cfn-macros.h" +#include "sbitmap.h" #define SIMD_MAX_BUILTIN_ARGS 5 @@ -1154,11 +1155,11 @@ arm_init_crypto_builtins (void) #undef NUM_DREG_TYPES #undef NUM_QREG_TYPES -#define def_mbuiltin(FLAGS, NAME, TYPE, CODE) \ +#define def_mbuiltin(FLAG, NAME, TYPE, CODE) \ do \ { \ - const arm_feature_set flags = FLAGS; \ - if (ARM_FSET_CPU_SUBSET (flags, insn_flags)) \ + if (FLAG == isa_nobit \ + || bitmap_bit_p (arm_active_target.isa, FLAG)) \ { \ tree bdecl; \ bdecl = add_builtin_function ((NAME), (TYPE), (CODE), \ @@ -1170,7 +1171,7 @@ arm_init_crypto_builtins (void) struct builtin_description { - const arm_feature_set features; + const enum isa_feature feature; const enum insn_code icode; const char * const name; const enum arm_builtins code; @@ -1181,12 +1182,12 @@ struct builtin_description static const struct builtin_description bdesc_2arg[] = { #define IWMMXT_BUILTIN(code, string, builtin) \ - { ARM_FSET_MAKE_CPU1 (FL_IWMMXT), CODE_FOR_##code, \ + { isa_bit_iwmmxt, CODE_FOR_##code, \ "__builtin_arm_" string, \ ARM_BUILTIN_##builtin, UNKNOWN, 0 }, #define IWMMXT2_BUILTIN(code, string, builtin) \ - { ARM_FSET_MAKE_CPU1 (FL_IWMMXT2), CODE_FOR_##code, \ + { isa_bit_iwmmxt2, CODE_FOR_##code, \ "__builtin_arm_" string, \ ARM_BUILTIN_##builtin, UNKNOWN, 0 }, @@ -1270,11 +1271,11 @@ static const struct builtin_description bdesc_2arg[] = IWMMXT_BUILTIN (iwmmxt_walignr3, "walignr3", WALIGNR3) #define IWMMXT_BUILTIN2(code, builtin) \ - { ARM_FSET_MAKE_CPU1 (FL_IWMMXT), CODE_FOR_##code, NULL, \ + { isa_bit_iwmmxt, CODE_FOR_##code, NULL, \ ARM_BUILTIN_##builtin, UNKNOWN, 0 }, #define IWMMXT2_BUILTIN2(code, builtin) \ - { ARM_FSET_MAKE_CPU2 (FL_IWMMXT2), CODE_FOR_##code, NULL, \ + { isa_bit_iwmmxt2, CODE_FOR_##code, NULL, \ ARM_BUILTIN_##builtin, UNKNOWN, 0 }, IWMMXT2_BUILTIN2 (iwmmxt_waddbhusm, WADDBHUSM) @@ -1290,7 +1291,7 @@ static const struct builtin_description bdesc_2arg[] = #define FP_BUILTIN(L, U) \ - {ARM_FSET_EMPTY, CODE_FOR_##L, "__builtin_arm_"#L, ARM_BUILTIN_##U, \ + {isa_nobit, CODE_FOR_##L, "__builtin_arm_"#L, ARM_BUILTIN_##U, \ UNKNOWN, 0}, FP_BUILTIN (get_fpscr, GET_FPSCR) @@ -1298,7 +1299,7 @@ static const struct builtin_description bdesc_2arg[] = #undef FP_BUILTIN #define CRC32_BUILTIN(L, U) \ - {ARM_FSET_EMPTY, CODE_FOR_##L, "__builtin_arm_"#L, \ + {isa_nobit, CODE_FOR_##L, "__builtin_arm_"#L, \ ARM_BUILTIN_##U, UNKNOWN, 0}, CRC32_BUILTIN (crc32b, CRC32B) CRC32_BUILTIN (crc32h, CRC32H) @@ -1310,7 +1311,7 @@ static const struct builtin_description bdesc_2arg[] = #define CRYPTO_BUILTIN(L, U) \ - {ARM_FSET_EMPTY, CODE_FOR_crypto_##L, "__builtin_arm_crypto_"#L, \ + {isa_nobit, CODE_FOR_crypto_##L, "__builtin_arm_crypto_"#L, \ ARM_BUILTIN_CRYPTO_##U, UNKNOWN, 0}, #undef CRYPTO1 #undef CRYPTO2 @@ -1567,9 +1568,9 @@ arm_init_iwmmxt_builtins (void) machine_mode mode; tree type; - if (d->name == 0 || - !(ARM_FSET_HAS_CPU1 (d->features, FL_IWMMXT) || - ARM_FSET_HAS_CPU1 (d->features, FL_IWMMXT2))) + if (d->name == 0 + || !(d->feature == isa_bit_iwmmxt + || d->feature == isa_bit_iwmmxt2)) continue; mode = insn_data[d->icode].operand[1].mode; @@ -1593,16 +1594,16 @@ arm_init_iwmmxt_builtins (void) gcc_unreachable (); } - def_mbuiltin (d->features, d->name, type, d->code); + def_mbuiltin (d->feature, d->name, type, d->code); } /* Add the remaining MMX insns with somewhat more complicated types. */ #define iwmmx_mbuiltin(NAME, TYPE, CODE) \ - def_mbuiltin (ARM_FSET_MAKE_CPU1 (FL_IWMMXT), "__builtin_arm_" NAME, \ + def_mbuiltin (isa_bit_iwmmxt, "__builtin_arm_" NAME, \ (TYPE), ARM_BUILTIN_ ## CODE) #define iwmmx2_mbuiltin(NAME, TYPE, CODE) \ - def_mbuiltin (ARM_FSET_MAKE_CPU1 (FL_IWMMXT2), "__builtin_arm_" NAME, \ + def_mbuiltin (isa_bit_iwmmxt2, "__builtin_arm_" NAME, \ (TYPE), ARM_BUILTIN_ ## CODE) iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO);