From patchwork Wed Nov 2 10:07:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 80461 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp50333qge; Wed, 2 Nov 2016 03:07:33 -0700 (PDT) X-Received: by 10.98.67.133 with SMTP id l5mr5354419pfi.170.1478081253143; Wed, 02 Nov 2016 03:07:33 -0700 (PDT) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id z70si2067985pff.228.2016.11.02.03.07.32 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Nov 2016 03:07:33 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-440153-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-440153-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-440153-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=fuf/S36LH3oRIGNNg SwDSTkjMVR8GqDYO3u5v2NzsWWtWQBpxVpacQxJDkh0DBtMyh6Ag8BQSm/rBermk eA36qSx1LItMWloHhuNOIyAmI5w1Ulue9dHuAWyc21GtY5KPCBfOy8dNSTaXmh/V XYyh2iKUJkgAky57bj7Fxjgn84= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=u7RPeako6FJK4xkbtk+WTel Sgz8=; b=jd7po6PPX+sVMx1vT6AmMRGvUlxNuwb/MJYl5IYX2FhTjyPAGneRoS5 ics3iqMNJD7Hn5gPjF3wOpcz+ghDVuevYsXUCoBezBO2TKt/1h2tUdQe+Sw0EDgj yvC7QOCjeNdaDzYRm95SqI2Q2PK7ScCUZYrNZ0+5y3xlBX7aYRV0= Received: (qmail 17455 invoked by alias); 2 Nov 2016 10:07:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 17434 invoked by uid 89); 2 Nov 2016 10:07:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.9 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=permissible, Processors, 3139, wires X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 02 Nov 2016 10:07:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C5FCCF6; Wed, 2 Nov 2016 03:07:07 -0700 (PDT) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ABE1A3F41F; Wed, 2 Nov 2016 03:07:06 -0700 (PDT) Subject: Re: [PATCH, gcc/ARM, ping] Add support for Cortex-M33 To: Kyrill Tkachov , Ramana Radhakrishnan , Richard Earnshaw , "gcc-patches@gcc.gnu.org" References: <45dd4770-6a33-f907-3534-87eaf3016165@foss.arm.com> From: Thomas Preudhomme Message-ID: Date: Wed, 2 Nov 2016 10:07:05 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <45dd4770-6a33-f907-3534-87eaf3016165@foss.arm.com> X-IsSubscribed: yes Ping? Best regards, Thomas On 26/10/16 17:42, Thomas Preudhomme wrote: > Hi, > > This patch adds support for the Cortex-M33 processor launched by ARM [1]. The > patch adds support for the name and wires it up to the ARMv8-M Mainline with DSP > extensions architecture and arm_v7m_tune tuning parameters for the time being. > It also updates documentation to mention this new processor. > > [1] http://www.arm.com/products/processors/cortex-m/cortex-m33-processor.php > > ChangeLog entry is as follows: > > *** gcc/Changelog *** > > 2016-10-26 Thomas Preud'homme > > * config/arm/arm-arches.def (armv8-m.main+dsp): Set Cortex-M33 as > representative core for this architecture. > * config/arm/arm-cores.def (cortex-m33): Define new processor. > * config/arm/arm-tables.opt: Regenerate. > * config/arm/arm-tune.md: Likewise. > * config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M33 to the list of > valid -mcpu options. > * doc/invoke.texi (ARM Options): Document new Cortex-M33 processor. > > > Tested by building libgcc and libstdc++ for Cortex-M33 and running a hello world > compiled for it. > > Is this ok for master? > > Best regards, > > Thomas diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def index 9293429b3f9a026bcdacc1651c534bdf14d4df1e..cd79bc505853d4dda6cf2e58bdc2d129032befef 100644 --- a/gcc/config/arm/arm-arches.def +++ b/gcc/config/arm/arm-arches.def @@ -73,7 +73,7 @@ ARM_ARCH("armv8-m.base", cortexm23, 8M_BASE, ARM_FSET_MAKE_CPU1 ( FL_FOR_ARCH8M_BASE)) ARM_ARCH("armv8-m.main", cortexm7, 8M_MAIN, ARM_FSET_MAKE_CPU1(FL_CO_PROC | FL_FOR_ARCH8M_MAIN)) -ARM_ARCH("armv8-m.main+dsp", cortexm7, 8M_MAIN, +ARM_ARCH("armv8-m.main+dsp", cortexm33, 8M_MAIN, ARM_FSET_MAKE_CPU1(FL_CO_PROC | FL_ARCH7EM | FL_FOR_ARCH8M_MAIN)) ARM_ARCH("iwmmxt", iwmmxt, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT)) ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2)) diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 940b5de82f0340fc0c26be80d47729bc1f193db0..ec63ee4abe54af06cd5531486f294f9a8dae71a1 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -168,6 +168,7 @@ ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7, 7A, ARM_FSET_MAKE_ /* V8 Architecture Processors */ ARM_CORE("cortex-m23", cortexm23, cortexm23, 8M_BASE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH8M_BASE), v6m) ARM_CORE("cortex-a32", cortexa32, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35) +ARM_CORE("cortex-m33", cortexm33, cortexm33, 8M_MAIN, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_ARCH7EM | FL_FOR_ARCH8M_MAIN), v7m) ARM_CORE("cortex-a35", cortexa35, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35) ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a53) ARM_CORE("cortex-a57", cortexa57, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index de712924afd33ba1e6e65cb56a5b260858d0cc4f..f7886b94be779fcba91506e77574662fe7188876 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -313,6 +313,9 @@ EnumValue Enum(processor_type) String(cortex-a32) Value(cortexa32) EnumValue +Enum(processor_type) String(cortex-m33) Value(cortexm33) + +EnumValue Enum(processor_type) String(cortex-a35) Value(cortexa35) EnumValue diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index 46c2c9258bcad43618a50f6201414fa084cb5b56..e782baccf424e51ac19ef5f02d25ed4f4eb0541d 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -33,8 +33,9 @@ cortexr8,cortexm7,cortexm4, cortexm3,marvell_pj4,cortexa15cortexa7, cortexa17cortexa7,cortexm23,cortexa32, - cortexa35,cortexa53,cortexa57, - cortexa72,cortexa73,exynosm1, - qdf24xx,xgene1,cortexa57cortexa53, - cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53" + cortexm33,cortexa35,cortexa53, + cortexa57,cortexa72,cortexa73, + exynosm1,qdf24xx,xgene1, + cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35, + cortexa73cortexa53" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index 302302f0d2d522fe282bb1d12687b53de72cae25..d45a1ca421901da25e16d965a9474438ea10f349 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -97,7 +97,7 @@ |march=armv8.2-a+fp16 \ |march=armv8-m.base|mcpu=cortex-m23 \ |march=armv8-m.main \ - |march=armv8-m.main+dsp \ + |march=armv8-m.main+dsp|mcpu=cortex-m33 \ :%{!r:--be8}}}" #else #define BE8_LINK_SPEC \ @@ -136,7 +136,7 @@ |march=armv8.2-a+fp16 \ |march=armv8-m.base|mcpu=cortex-m23 \ |march=armv8-m.main \ - |march=armv8-m.main+dsp \ + |march=armv8-m.main+dsp|mcpu=cortex-m33 \ :%{!r:--be8}}}" #endif diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 42f0307b36e4fe75c946a64bf6258a1ba1bd7b3d..de328dd6c475b498c64113398e49e319fd5a982e 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14853,6 +14853,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, +@samp{cortex-m33}, @samp{cortex-m23}, @samp{cortex-m7}, @samp{cortex-m4},