From patchwork Wed Nov 30 11:48:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 85009 Delivered-To: patch@linaro.org Received: by 10.182.112.6 with SMTP id im6csp241789obb; Wed, 30 Nov 2016 03:49:13 -0800 (PST) X-Received: by 10.99.111.78 with SMTP id k75mr59394696pgc.114.1480506553052; Wed, 30 Nov 2016 03:49:13 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id d22si64094959pfe.248.2016.11.30.03.49.12 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 30 Nov 2016 03:49:13 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-443030-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-443030-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-443030-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:message-id:date:mime-version:content-type; q=dns; s= default; b=Qgpb/7xhp7f/fhfcHWSitnlPvDtuQdHY+EBA1j7S+tXgRl8gknUvi UEvrnAvZ/H/FKC0HRGf/bcHBqHenzG4QbqIy4l9FdSJJm6d6KXaTbYGts+ycKdus +gYBpg1FPXeHKQjbOSlOMJ6aJ7LlXBufTkh+tTFAJS/H9sh3/aSQgU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:message-id:date:mime-version:content-type; s= default; bh=0bSGBBokfNjXS2TnGkDIW8kJqnQ=; b=OLT7AlILG7IsN41PO/hE +nT8qV2/j9zSFZLvT/1Vk6hu42Fcu/kpsy34D6/V3ZHJZXU6qWs/3ndM4Rc8SJtC Wz2L9a5Ub/A5Evkf79qmznuK/62gzAnyA7p4TqRoNiHln0lF3KwlOPwTDS+IfmbU zA8722HV7lcerIphcYAQWWU= Received: (qmail 73358 invoked by alias); 30 Nov 2016 11:48:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 72295 invoked by uid 89); 30 Nov 2016 11:48:54 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.8 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=20161130 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 30 Nov 2016 11:48:44 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EA1EE1515; Wed, 30 Nov 2016 03:48:42 -0800 (PST) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 357913F318; Wed, 30 Nov 2016 03:48:42 -0800 (PST) From: Thomas Preudhomme Subject: [PATCH, GCC/ARM] Add multilib mapping for Cortex-M23 & Cortex-M33 To: Kyrill Tkachov , Ramana Radhakrishnan , Richard Earnshaw , "gcc-patches@gcc.gnu.org" Message-ID: Date: Wed, 30 Nov 2016 11:48:40 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 X-IsSubscribed: yes Hi, With ARM Cortex-M23 and Cortex-M33 and the support for RM profile multilib added recently, it's time to add the corresponding CPU to architecture mappings in config/arm/t-rmprofile. Note that Cortex-M33 is mapped to ARMv8-M Mainline because there is no transitive closure of mappings and the multilib for ARMv8-M Mainline with DSP extensions is ARMv8-M Mainline. ChangeLog entry is as follows: *** gcc/ChangeLog *** 2016-11-30 Thomas Preud'homme * config/arm/t-rmprofile: Add mappings for Cortex-M23 and Cortex-M33. Testing: Linking fails before this patch when targeting one of these two cores and using rmprofile multilib but succeeds with the patch. Is this ok for stage3? Best regards, Thomas diff --git a/gcc/config/arm/t-rmprofile b/gcc/config/arm/t-rmprofile index c8b5c9cbd03694eea69855e20372afa3e97d6b4c..93aa909b4d942ad9875a95e0d4397ff17b317905 100644 --- a/gcc/config/arm/t-rmprofile +++ b/gcc/config/arm/t-rmprofile @@ -102,6 +102,8 @@ MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1.small-multiply MULTILIB_MATCHES += march?armv7-m=mcpu?cortex-m3 MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m4 MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m7 +MULTILIB_MATCHES += march?armv8-m.base=mcpu?cortex-m23 +MULTILIB_MATCHES += march?armv8-m.main=mcpu?cortex-m33 MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4 MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4f MULTILIB_MATCHES += march?armv7=mcpu?cortex-r5