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Wed, 07 Dec 2016 07:25:27 +0000 Received: from CO2PR07MB2694.namprd07.prod.outlook.com (10.166.214.7) by BL2PR07MB2307.namprd07.prod.outlook.com (10.167.101.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.747.13; Wed, 7 Dec 2016 07:25:23 +0000 Received: from CO2PR07MB2694.namprd07.prod.outlook.com ([10.166.214.7]) by CO2PR07MB2694.namprd07.prod.outlook.com ([10.166.214.7]) with mapi id 15.01.0747.021; Wed, 7 Dec 2016 07:25:22 +0000 From: "Hurugalawadi, Naveen" To: James Greenhalgh CC: "gcc-patches@gcc.gnu.org" , Richard Earnshaw , Marcus Shawcroft , "Pinski, Andrew" , "nd@arm.com" , Kyrill Tkachov Subject: Re: [PATCH] [AArch64] Fix PR71112 Date: Wed, 7 Dec 2016 07:25:21 +0000 Message-ID: References: , <20161206123126.GA37335@arm.com> In-Reply-To: <20161206123126.GA37335@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Naveen.Hurugalawadi@cavium.com; x-microsoft-exchange-diagnostics: 1; BL2PR07MB2307; 7:X4z9Mg/S2Aqz0PjXPorHFWV2PSaMDTrb/umK1CZBxMJo0z3awGMNujVS64kjNKCrINzvUwWsabwQqchGE25yvhGImDrz1zoJBSR/Mus5evq3EvJLsEzl851YrqKDVD94mGMVstqj7lQpRlnCcAzD23HWALTLbqUKX/dKjruCefASd6hnbpWwlG9uFasioMtZOhSeOCwVUF+cPLrSCCO5yWXr24F9e13at5GOVPVfQPNJyvG1n2eyYgJZ1fvsiLtQkNhYdXUW/3MhoFbfRxlmKofKED05auSgR5hnHTOAIhiKCZbf0pVVNALBNHtm4z2bNu+tjqMgMA+9NTj8sP0BlqnUfHvpr38McIaUnTaSynYbRcjSKxIxWdqKfs/LLOIm4vhGpXnm5qKc5GGJmzmhQFURrj2nRTKAbSFMhnkIL1ClFILRGexxrvhjQNJT8bV8Nhu8rSSxyp/UVEQcElNjBw== x-forefront-antispam-report: SFV:SKI; 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PCL:0; RULEID:(102415395)(6040375)(601004)(2401047)(5005006)(8121501046)(3002001)(10201501046)(6041248)(20161123560025)(20161123564025)(20161123562025)(20161123555025)(20161123558021)(6072148); SRVR:BL2PR07MB2307; BCL:0; PCL:0; RULEID:; SRVR:BL2PR07MB2307; x-forefront-prvs: 01494FA7F7 received-spf: None (protection.outlook.com: cavium.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Dec 2016 07:25:21.6592 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2PR07MB2307 Hi James, Thanks for the review and suggestions regarding the testcase. >> Why limit the ABI and endianness here, and if you do plan to do that Extra options have been dropped and the testcase will check across all variants and endianness. Please find attached the modified patch as per the comments and let me know if its okay? Thanks, Naveen diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index dab46b5..9fce849 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1302,7 +1302,8 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm, emit_move_insn (gp_rtx, gen_rtx_HIGH (Pmode, s)); if (mode != GET_MODE (gp_rtx)) - gp_rtx = simplify_gen_subreg (mode, gp_rtx, GET_MODE (gp_rtx), 0); + gp_rtx = gen_lowpart (mode, gp_rtx); + } if (mode == ptr_mode) diff --git a/gcc/testsuite/gcc.c-torture/compile/pr71112.c b/gcc/testsuite/gcc.c-torture/compile/pr71112.c new file mode 100644 index 0000000..69e2df6 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr71112.c @@ -0,0 +1,10 @@ +/* PR target/71112. */ +/* { dg-additional-options "-fpie" { target pie } } */ + +extern int dbs[100]; +void f (int *); +int nscd_init (void) +{ + f (dbs); + return 0; +}