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[209.132.180.131]) by mx.google.com with ESMTPS id y1si35470189par.23.2015.09.02.06.18.44 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Sep 2015 06:18:45 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-406525-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 121296 invoked by alias); 2 Sep 2015 13:18:10 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 121202 invoked by uid 89); 2 Sep 2015 13:18:10 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-qk0-f170.google.com Received: from mail-qk0-f170.google.com (HELO mail-qk0-f170.google.com) (209.85.220.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 02 Sep 2015 13:18:07 +0000 Received: by qkfq186 with SMTP id q186so4298021qkf.1 for ; Wed, 02 Sep 2015 06:18:03 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.55.197.69 with SMTP id p66mr28633749qki.59.1441199883585; Wed, 02 Sep 2015 06:18:03 -0700 (PDT) Received: by 10.140.96.71 with HTTP; Wed, 2 Sep 2015 06:18:03 -0700 (PDT) Date: Wed, 2 Sep 2015 15:18:03 +0200 Message-ID: Subject: [AArch64_be] Fix vldX/vstX AdvSIMD intrinsics From: Christophe Lyon To: "gcc-patches@gcc.gnu.org" X-IsSubscribed: yes X-Original-Sender: christophe.lyon@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2a00:1450:4010:c04::22c as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gcc.gnu.org X-Google-Group-Id: 836684582541 Hi, The aarch64_vldX/aarch64_vstX expanders used for the vldX/vstX AdvSIMD intrisics in Q mode called vec_load_lanes, witch shuffles the vectors to match the layout expected by the vectorizer. We do not want this to happen when the intrinsics are called directly by the end-user code. This patch fixes this, by calling gen_aarch64_simd_ldX/gen_aarch64_simd_stX. With this patch, the following tests now pass in advsimd-intrinsics (target aarch64_be): vldX_lane.c, vtrn, vuzp, vzip as well as aarch64/vldN_1.c and aarch64/vstN_1.c It fixes PR 59810, 63652, 63653. No regression, and tested on aarch64 and aarch64_be using the Foundation Model. OK for trunk? Christophe. 2015-09-02 Christophe Lyon PR target/59810 PR target/63652 PR target/63653 * config/aarch64/aarch64-simd.md (aarch64_ld): Call gen_aarch64_simd_ld. (aarch64_st): Call gen_aarch64_simd_st. diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 9777418..75fa0ab 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -4566,7 +4566,7 @@ machine_mode mode = mode; rtx mem = gen_rtx_MEM (mode, operands[1]); - emit_insn (gen_vec_load_lanes (operands[0], mem)); + emit_insn (gen_aarch64_simd_ld (operands[0], mem)); DONE; }) @@ -4849,7 +4849,7 @@ machine_mode mode = mode; rtx mem = gen_rtx_MEM (mode, operands[0]); - emit_insn (gen_vec_store_lanes (mem, operands[1])); + emit_insn (gen_aarch64_simd_st (mem, operands[1])); DONE; })