From patchwork Wed Mar 19 17:11:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Venkataramanan Kumar X-Patchwork-Id: 26602 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qa0-f70.google.com (mail-qa0-f70.google.com [209.85.216.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 74644203C3 for ; Wed, 19 Mar 2014 17:11:56 +0000 (UTC) Received: by mail-qa0-f70.google.com with SMTP id hw13sf19234297qab.5 for ; Wed, 19 Mar 2014 10:11:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:mime-version:date:message-id :subject:from:to:cc:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=1vvWsXX85msXdcu2qu9T5IDVA3IAudrNcNSPgu30MRg=; b=ek3QIlibIZ8oiLNpA/G5uUDDEzU3PgRhXjVmJk1DIX2iUNTu2FlJGDl42sQIUquxSA mZRGmPSBX4qPg10iP37tl4ezmo7kwXU58gb+fchl3KMMmmetYBtV4iUmfSPWrOw+rqui VOTZf9wMT919iDafAcxxASLdgadBqqL/uGDbjOXCVVMPq4sN+RYlsJdEcTNDKHdE3BxZ EGIIN94KvFvNRDW4dkLZJYFfKHYrrI2HfrhGaOpRfNpOYMIUkpoK2nn+zdURv0QufkSO 66Qf4g5nT30Uf4ZWj/Kx2Z4CC83efH/l9BeHt7itvt2EGUwcl8ctzXwbR5gq/JiU904C QwSA== X-Gm-Message-State: ALoCoQl1X1rlI1UGI/TkH6Ggaj23uWE8sV5GEbGJGAHLpuMwbaR2sknrr399BeSaugCmKXHtAMyR X-Received: by 10.58.85.3 with SMTP id d3mr6000722vez.40.1395249116039; Wed, 19 Mar 2014 10:11:56 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.83.85 with SMTP id i79ls2576445qgd.21.gmail; Wed, 19 Mar 2014 10:11:55 -0700 (PDT) X-Received: by 10.221.55.199 with SMTP id vz7mr10581vcb.40.1395249115894; Wed, 19 Mar 2014 10:11:55 -0700 (PDT) Received: from mail-vc0-f173.google.com (mail-vc0-f173.google.com [209.85.220.173]) by mx.google.com with ESMTPS id sq9si3669950vdc.143.2014.03.19.10.11.55 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 19 Mar 2014 10:11:55 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.173; Received: by mail-vc0-f173.google.com with SMTP id il7so9440538vcb.18 for ; Wed, 19 Mar 2014 10:11:55 -0700 (PDT) X-Received: by 10.221.55.133 with SMTP id vy5mr31056983vcb.17.1395249115791; Wed, 19 Mar 2014 10:11:55 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.78.9 with SMTP id i9csp318206vck; Wed, 19 Mar 2014 10:11:55 -0700 (PDT) X-Received: by 10.140.50.169 with SMTP id s38mr42368206qga.12.1395249114548; Wed, 19 Mar 2014 10:11:54 -0700 (PDT) Received: from mail-qa0-f42.google.com (mail-qa0-f42.google.com [209.85.216.42]) by mx.google.com with ESMTPS id c7si1263427qar.55.2014.03.19.10.11.54 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 19 Mar 2014 10:11:54 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.216.42 is neither permitted nor denied by best guess record for domain of venkataramanan.kumar@linaro.org) client-ip=209.85.216.42; Received: by mail-qa0-f42.google.com with SMTP id k15so9039885qaq.29 for ; Wed, 19 Mar 2014 10:11:54 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.224.36.129 with SMTP id t1mr4347606qad.88.1395249114228; Wed, 19 Mar 2014 10:11:54 -0700 (PDT) Received: by 10.140.43.66 with HTTP; Wed, 19 Mar 2014 10:11:53 -0700 (PDT) Date: Wed, 19 Mar 2014 22:41:53 +0530 Message-ID: Subject: [PATCH 1/2, AARCH64]: Machine descriptions: Re: [RFC] [PATCH, AARCH64] : Using standard patterns for stack protection. From: Venkataramanan Kumar To: Marcus Shawcroft Cc: "gcc-patches@gcc.gnu.org" , Patch Tracking X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: venkataramanan.kumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Hi Marcus, On 14 March 2014 19:42, Marcus Shawcroft wrote: > Hi Venkat > > On 5 February 2014 10:29, Venkataramanan Kumar > wrote: >> Hi Marcus, >> >>> + "ldr\\t%x2, %1\;str\\t%x2, %0\;mov\t%x2,0" >>> + [(set_attr "length" "12")]) >>> >>> This pattern emits an opaque sequence of instructions that cannot be >>> scheduled, is that necessary? Can we not expand individual >>> instructions or at least split ? >> >> Almost all the ports emits a template of assembly instructions. >> I m not sure why they have to be generated this way. >> But usage of these pattern is to clear the register that holds canary >> value immediately after its usage. > > I've just read the thread Andrew pointed out, thanks, I'm happy that > there is a good reason to do it this way. Andrew, thanks for > providing the background. > > + [(set_attr "length" "12")]) > + > > These patterns should also set the "type" attribute, a reasonable > value would be "multiple". > I have incorporated your review comments and split the patch into two. The first patch attached here contains Aarch64 machine descriptions for the stack protect patterns. ChangeLog. 2014-03-19 Venkataramanan Kumar * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test) (stack_protect_set_, stack_protect_test_): Add machine descriptions for Stack Smashing Protector. Tested for aarch64-none-linux-gnu target under QEMU . regards, Venkat. Index: gcc/config/aarch64/aarch64.md =================================================================== --- gcc/config/aarch64/aarch64.md (revision 208609) +++ gcc/config/aarch64/aarch64.md (working copy) @@ -102,6 +102,8 @@ UNSPEC_TLSDESC UNSPEC_USHL_2S UNSPEC_VSTRUCTDUMMY + UNSPEC_SP_SET + UNSPEC_SP_TEST ]) (define_c_enum "unspecv" [ @@ -3634,6 +3636,67 @@ DONE; }) +;; Named patterns for stack smashing protection. +(define_expand "stack_protect_set" + [(match_operand 0 "memory_operand") + (match_operand 1 "memory_operand")] + "" +{ + enum machine_mode mode = GET_MODE (operands[0]); + + emit_insn ((mode == DImode + ? gen_stack_protect_set_di + : gen_stack_protect_set_si) (operands[0], operands[1])); + DONE; +}) + +(define_insn "stack_protect_set_" + [(set (match_operand:PTR 0 "memory_operand" "=m") + (unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")] + UNSPEC_SP_SET)) + (set (match_scratch:PTR 2 "=&r") (const_int 0))] + "" + "ldr\\t%x2, %1\;str\\t%x2, %0\;mov\t%x2,0" + [(set_attr "length" "12") + (set_attr "type" "multiple")]) + +(define_expand "stack_protect_test" + [(match_operand 0 "memory_operand") + (match_operand 1 "memory_operand") + (match_operand 2)] + "" +{ + + rtx result = gen_reg_rtx (Pmode); + + enum machine_mode mode = GET_MODE (operands[0]); + + emit_insn ((mode == DImode + ? gen_stack_protect_test_di + : gen_stack_protect_test_si) (result, + operands[0], + operands[1])); + + if (mode == DImode) + emit_jump_insn (gen_cbranchdi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx), + result, const0_rtx, operands[2])); + else + emit_jump_insn (gen_cbranchsi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx), + result, const0_rtx, operands[2])); + DONE; +}) + +(define_insn "stack_protect_test_" + [(set (match_operand:PTR 0 "register_operand") + (unspec:PTR [(match_operand:PTR 1 "memory_operand" "m") + (match_operand:PTR 2 "memory_operand" "m")] + UNSPEC_SP_TEST)) + (clobber (match_scratch:PTR 3 "=&r"))] + "" + "ldr\t%x3, %x1\;ldr\t%x0, %x2\;eor\t%x0, %x3, %x0" + [(set_attr "length" "12") + (set_attr "type" "multiple")]) + ;; AdvSIMD Stuff (include "aarch64-simd.md")