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[209.132.180.131]) by mx.google.com with ESMTPS id re5si15358909pab.232.2015.05.04.01.59.21 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 May 2015 01:59:22 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-396757-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 58437 invoked by alias); 4 May 2015 08:59:05 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 58428 invoked by uid 89); 4 May 2015 08:59:04 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wg0-f51.google.com Received: from mail-wg0-f51.google.com (HELO mail-wg0-f51.google.com) (74.125.82.51) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Mon, 04 May 2015 08:59:03 +0000 Received: by wgen6 with SMTP id n6so143286242wge.3 for ; Mon, 04 May 2015 01:59:00 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.180.82.135 with SMTP id i7mr18219117wiy.68.1430729939897; Mon, 04 May 2015 01:58:59 -0700 (PDT) Received: by 10.28.4.204 with HTTP; Mon, 4 May 2015 01:58:59 -0700 (PDT) In-Reply-To: References: Date: Mon, 4 May 2015 10:58:59 +0200 Message-ID: Subject: Re: [PATCH, AArch64] Add Cortex-A53 erratum 843419 configure-time option From: Yvan Roux To: Marcus Shawcroft Cc: "gcc-patches@gcc.gnu.org" , Maxim Kuvyrkov , Richard Earnshaw , James Greenhalgh X-IsSubscribed: yes X-Original-Sender: yvan.roux@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2a00:1450:4010:c04::236 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gcc.gnu.org X-Google-Group-Id: 836684582541 Hi Marcus, On 1 May 2015 at 17:18, Marcus Shawcroft wrote: > On 1 May 2015 at 14:56, Yvan Roux wrote: > >> 2015-05-01 Yvan Roux >> >> * configure.ac: Add --enable-fix-cortex-a53-843419 option. >> * configure: Regenerate. >> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define. >> (LINK_SPEC): Include CA53_ERR_843419_SPEC. >> * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define. >> (LINK_SPEC): Include CA53_ERR_843419_SPEC. >> * doc/install.texi (aarch64*-*-*): Document >> new --enable-fix-cortex-a53-843419 option >> * config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option. >> * doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419 >> and -mno-fix-cortex-a53-8434199 options. >> > > +@option{--enable-fix-cortex-a53-843419} option. This erratum > workaround is > +made at link time and enabling it by default in GCC will only pass > the > > How about something like "The workaround is applied at link time. > Enabling the workaround will cause GCC to pass the relevant option to > the linker." ? Yes this is a better formulation. > +corresponding flag to the linker. It can be explicitly disabled > during > +compilation by passing the @option{-mno-fix-cortex-a53-835769} option. > > Copy paste error here with the previous errata number. Here is the patch with the modifications. Is it needed to backport it into 4.9 and 5.1 branches ? Cheers, Yvan diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h index ebeeb50..bd5e51c 100644 --- a/gcc/config/aarch64/aarch64-elf-raw.h +++ b/gcc/config/aarch64/aarch64-elf-raw.h @@ -35,10 +35,19 @@ " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}" #endif +#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT +#define CA53_ERR_843419_SPEC \ + " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}" +#else +#define CA53_ERR_843419_SPEC \ + " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}" +#endif + #ifndef LINK_SPEC #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \ -maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \ - CA53_ERR_835769_SPEC + CA53_ERR_835769_SPEC \ + CA53_ERR_843419_SPEC #endif #endif /* GCC_AARCH64_ELF_RAW_H */ diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h index 9abb252..7973268 100644 --- a/gcc/config/aarch64/aarch64-linux.h +++ b/gcc/config/aarch64/aarch64-linux.h @@ -49,8 +49,17 @@ " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}" #endif +#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT +#define CA53_ERR_843419_SPEC \ + " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}" +#else +#define CA53_ERR_843419_SPEC \ + " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}" +#endif + #define LINK_SPEC LINUX_TARGET_LINK_SPEC \ - CA53_ERR_835769_SPEC + CA53_ERR_835769_SPEC \ + CA53_ERR_843419_SPEC #define GNU_USER_TARGET_MATHFILE_SPEC \ "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}" diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index f2ef124..6d72ac2 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -71,6 +71,10 @@ mfix-cortex-a53-835769 Target Report Var(aarch64_fix_a53_err835769) Init(2) Workaround for ARM Cortex-A53 Erratum number 835769 +mfix-cortex-a53-843419 +Target Report +Workaround for ARM Cortex-A53 Erratum number 843419 + mlittle-endian Target Report RejectNegative InverseMask(BIG_END) Assume target CPU is configured as little endian diff --git a/gcc/configure b/gcc/configure index 84f58ce..e563e94 100755 --- a/gcc/configure +++ b/gcc/configure @@ -923,6 +923,7 @@ enable_gnu_indirect_function enable_initfini_array enable_comdat enable_fix_cortex_a53_835769 +enable_fix_cortex_a53_843419 with_glibc_version enable_gnu_unique_object enable_linker_build_id @@ -1648,6 +1649,14 @@ Optional Features: disable workaround for AArch64 Cortex-A53 erratum 835769 by default + + --enable-fix-cortex-a53-843419 + enable workaround for AArch64 Cortex-A53 erratum + 843419 by default + --disable-fix-cortex-a53-843419 + disable workaround for AArch64 Cortex-A53 erratum + 843419 by default + --enable-gnu-unique-object enable the use of the @gnu_unique_object ELF extension on glibc systems @@ -18153,7 +18162,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 18156 "configure" +#line 18165 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -18259,7 +18268,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 18262 "configure" +#line 18271 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -24102,6 +24111,25 @@ if test "${enable_fix_cortex_a53_835769+set}" = set; then : fi + # Enable default workaround for AArch64 Cortex-A53 erratum 843419. + # Check whether --enable-fix-cortex-a53-843419 was given. +if test "${enable_fix_cortex_a53_843419+set}" = set; then : + enableval=$enable_fix_cortex_a53_843419; + case $enableval in + yes) + tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1" + ;; + no) + ;; + *) + as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\ + Valid choices are 'yes' and 'no'." "$LINENO" 5 + ;; + + esac + +fi + ;; # All TARGET_ABI_OSF targets. diff --git a/gcc/configure.ac b/gcc/configure.ac index 7fb6131..55fe633 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -3592,6 +3592,29 @@ AS_HELP_STRING([--disable-fix-cortex-a53-835769], esac ], []) + # Enable default workaround for AArch64 Cortex-A53 erratum 843419. + AC_ARG_ENABLE(fix-cortex-a53-843419, + [ +AS_HELP_STRING([--enable-fix-cortex-a53-843419], + [enable workaround for AArch64 Cortex-A53 erratum 843419 by default]) +AS_HELP_STRING([--disable-fix-cortex-a53-843419], + [disable workaround for AArch64 Cortex-A53 erratum 843419 by default]) + ], + [ + case $enableval in + yes) + tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1" + ;; + no) + ;; + *) + AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\ + Valid choices are 'yes' and 'no'.]) + ;; + + esac + ], + []) ;; # All TARGET_ABI_OSF targets. diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 783116e..d8d3939 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -3408,13 +3408,24 @@ not support option @option{-mabi=ilp32}. To enable a workaround for the Cortex-A53 erratum number 835769 by default (for all CPUs regardless of -mcpu option given) at configure time use the @option{--enable-fix-cortex-a53-835769} option. This will enable the fix by -default and can be explicitly disabled during during compilation by passing the +default and can be explicitly disabled during compilation by passing the @option{-mno-fix-cortex-a53-835769} option. Conversely, @option{--disable-fix-cortex-a53-835769} will disable the workaround by default. The workaround is disabled by default if neither of @option{--enable-fix-cortex-a53-835769} or @option{--disable-fix-cortex-a53-835769} is given at configure time. +To enable a workaround for the Cortex-A53 erratum number 843419 by default +(for all CPUs regardless of -mcpu option given) at configure time use the +@option{--enable-fix-cortex-a53-843419} option. This workaround is applied at +link time. Enabling the workaround will cause GCC to pass the relevant option +to the linker. It can be explicitly disabled during compilation by passing the +@option{-mno-fix-cortex-a53-843419} option. Conversely, +@option{--disable-fix-cortex-a53-843419} will disable the workaround by default. +The workaround is disabled by default if neither of +@option{--enable-fix-cortex-a53-843419} or +@option{--disable-fix-cortex-a53-843419} is given at configure time. + @html
@end html diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 7d2f6e5..712c187 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -512,6 +512,7 @@ Objective-C and Objective-C++ Dialects}. -momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol -mtls-dialect=desc -mtls-dialect=traditional @gol -mfix-cortex-a53-835769 -mno-fix-cortex-a53-835769 @gol +-mfix-cortex-a53-843419 -mno-fix-cortex-a53-843419 @gol -march=@var{name} -mcpu=@var{name} -mtune=@var{name}} @emph{Adapteva Epiphany Options} @@ -12324,6 +12325,14 @@ Enable or disable the workaround for the ARM Cortex-A53 erratum number 835769. This involves inserting a NOP instruction between memory instructions and 64-bit integer multiply-accumulate instructions. +@item -mfix-cortex-a53-843419 +@itemx -mno-fix-cortex-a53-843419 +@opindex mfix-cortex-a53-843419 +@opindex mno-fix-cortex-a53-843419 +Enable or disable the workaround for the ARM Cortex-A53 erratum number 843419. +This erratum workaround is made at link time and this will only pass the +corresponding flag to the linker. + @item -march=@var{name} @opindex march Specify the name of the target architecture, optionally suffixed by one or