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[209.132.180.131]) by mx.google.com with ESMTPS id ha8si17382681pac.216.2015.08.07.06.05.47 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Aug 2015 06:05:48 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-404861-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 47096 invoked by alias); 7 Aug 2015 13:05:34 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 47085 invoked by uid 89); 7 Aug 2015 13:05:32 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wi0-f179.google.com Received: from mail-wi0-f179.google.com (HELO mail-wi0-f179.google.com) (209.85.212.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 07 Aug 2015 13:05:29 +0000 Received: by wibxm9 with SMTP id xm9so65102740wib.1 for ; Fri, 07 Aug 2015 06:05:26 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.180.83.137 with SMTP id q9mr6560100wiy.68.1438952726481; Fri, 07 Aug 2015 06:05:26 -0700 (PDT) Received: by 10.28.213.205 with HTTP; Fri, 7 Aug 2015 06:05:26 -0700 (PDT) Date: Fri, 7 Aug 2015 15:05:26 +0200 Message-ID: Subject: [PATCH] PR target/67127: [ARM] Avoiding odd-number ldrd/strd in movdi introduced a regression on armeb-linux-gnueabihf From: Yvan Roux To: "gcc-patches@gcc.gnu.org" Cc: alan.lawrence@arm.com, Richard Earnshaw , Kyrylo Tkachov , Ramana Radhakrishnan X-IsSubscribed: yes X-Original-Sender: yvan.roux@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2a00:1450:4010:c04::236 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gcc.gnu.org X-Google-Group-Id: 836684582541 Hi, this patch is a fix for pr27127. It avoids splitting the DI registers into SI ones if it is not allowed, which breaks the introduced loop. I haven't added a testcase as the bug is already exhibited by several regressions (like g++.dg/ext/attribute-test-2.C or g++.dg/eh/simd-1.C) but I can add one if you think it is needed. Cross built and regtested on trunk and gcc-5 branch and the regression mentioned in https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00216.html is not observed. Is it ok for trunk and branch ? Thanks, Yvan gcc/ PR target/67127 * config/arm/arm.md (movdi): Avoid forbidden modes changed. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index be51c77..d89e853 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -5482,7 +5482,8 @@ operands[1] = force_reg (DImode, operands[1]); } if (REG_P (operands[0]) && REGNO (operands[0]) < FIRST_VIRTUAL_REGISTER - && !HARD_REGNO_MODE_OK (REGNO (operands[0]), DImode)) + && !HARD_REGNO_MODE_OK (REGNO (operands[0]), DImode) + && !REG_CANNOT_CHANGE_MODE_P (REGNO (operands[0]), DImode, SImode)) { /* Avoid LDRD's into an odd-numbered register pair in ARM state when expanding function calls. */ @@ -5501,7 +5502,8 @@ DONE; } else if (REG_P (operands[1]) && REGNO (operands[1]) < FIRST_VIRTUAL_REGISTER - && !HARD_REGNO_MODE_OK (REGNO (operands[1]), DImode)) + && !HARD_REGNO_MODE_OK (REGNO (operands[1]), DImode) + && !REG_CANNOT_CHANGE_MODE_P (REGNO (operands[1]), DImode, SImode)) { /* Avoid STRD's from an odd-numbered register pair in ARM state when expanding function prologue. */