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[209.132.180.131]) by mx.google.com with ESMTPS id ha5si12874478pbc.215.2014.03.25.23.16.33 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Mar 2014 23:16:34 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-363970-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 13658 invoked by alias); 26 Mar 2014 06:16:22 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 13648 invoked by uid 89); 26 Mar 2014 06:16:21 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-lb0-f170.google.com Received: from mail-lb0-f170.google.com (HELO mail-lb0-f170.google.com) (209.85.217.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 26 Mar 2014 06:16:20 +0000 Received: by mail-lb0-f170.google.com with SMTP id s7so1146088lbd.1 for ; Tue, 25 Mar 2014 23:16:16 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.112.254.163 with SMTP id aj3mr50256888lbd.20.1395814576834; Tue, 25 Mar 2014 23:16:16 -0700 (PDT) Received: by 10.112.135.105 with HTTP; Tue, 25 Mar 2014 23:16:16 -0700 (PDT) Date: Wed, 26 Mar 2014 14:16:16 +0800 Message-ID: Subject: [PATCH] Fix PR rtl-optimization/pr60663 From: Zhenqiang Chen To: "gcc-patches@gcc.gnu.org" X-IsSubscribed: yes X-Original-Sender: zhenqiang.chen@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c03::22d is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gcc.gnu.org X-Google-Group-Id: 836684582541 Hi, The patch checks the number of the expected operands in ASM_OPERANDS_TEMPLATE with the same logic as it in output_asm_insn to make sure the ASM_OPERANDS are legal. Bootstrap and no make check regression on X86-64 and ARM chromebook. OK for trunk? Thanks! -Zhenqiang ChangeLog: 2014-03-26 Zhenqiang Chen PR rtl-optimization/pr60663 * recog.c (check_asm_operands): Check the number of expected operands. testsuite/ChangeLog: 2014-03-26 Zhenqiang Chen * gcc.dg/pr60663: New testcase. diff --git a/gcc/recog.c b/gcc/recog.c index f9040dc..65078ad 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -135,8 +135,8 @@ check_asm_operands (rtx x) { int noperands; rtx *operands; - const char **constraints; - int i; + const char **constraints, *templ; + int i, c; if (!asm_labels_ok (x)) return 0; @@ -159,7 +159,29 @@ check_asm_operands (rtx x) operands = XALLOCAVEC (rtx, noperands); constraints = XALLOCAVEC (const char *, noperands); - decode_asm_operands (x, operands, NULL, constraints, NULL, NULL); + templ = decode_asm_operands (x, operands, NULL, constraints, NULL, NULL); + /* The following logic is similar with it in output_asm_insn (final.c). + It checks the number of expected operands in ASM_OPERANDS_TEMPLATE. */ + if (*templ) + { + const char* p = templ; + while ((c = *p++)) + { + if (c == '%') + if (ISDIGIT (*p)) + { + int opnum; + char *endptr; + + opnum = strtoul (p, &endptr, 10); + if (opnum >= noperands) + return 0; + + p = endptr; + c = *p; + } + } + } for (i = 0; i < noperands; i++) { diff --git a/gcc/testsuite/gcc.dg/pr60663.c b/gcc/testsuite/gcc.dg/pr60663.c new file mode 100644 index 0000000..6c01084 --- /dev/null +++ b/gcc/testsuite/gcc.dg/lp.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options " -O2 " } */ + +int g (void) +{ + unsigned i, j; + asm("// %0 %1" : "=r" (i), "=r"(j)); + return i; +}