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[209.132.180.131]) by mx.google.com with ESMTPS id ik5si20442447pbb.190.2014.06.23.00.01.32 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jun 2014 00:01:33 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-370793-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 18018 invoked by alias); 23 Jun 2014 07:01:20 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 18006 invoked by uid 89); 23 Jun 2014 07:01:19 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-lb0-f173.google.com Received: from mail-lb0-f173.google.com (HELO mail-lb0-f173.google.com) (209.85.217.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 23 Jun 2014 07:00:50 +0000 Received: by mail-lb0-f173.google.com with SMTP id s7so3895361lbd.18 for ; Mon, 23 Jun 2014 00:00:47 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.112.126.38 with SMTP id mv6mr10046649lbb.54.1403506847334; Mon, 23 Jun 2014 00:00:47 -0700 (PDT) Received: by 10.112.13.36 with HTTP; Mon, 23 Jun 2014 00:00:47 -0700 (PDT) Date: Mon, 23 Jun 2014 15:00:47 +0800 Message-ID: Subject: [PATCH, 8/10] aarch64: ccmp insn patterns From: Zhenqiang Chen To: "gcc-patches@gcc.gnu.org" X-IsSubscribed: yes X-Original-Sender: zhenqiang.chen@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2607:f8b0:400c:c03::229 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gcc.gnu.org X-Google-Group-Id: 836684582541 Hi, The patch adds two insn patterns for ccmp instructions. cbranchcc4 is introduced to generate optimized conditional branch without an additional compare against the result of ccmp. OK for trunk? Thanks! -Zhenqiang ChangeLog: 2014-06-23 Zhenqiang Chen * config/aarch64/aarch64.md (cbranchcc4): New. (*ccmp_and, *ccmp_ior): New. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index a4d8887..c25d940 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -230,6 +230,52 @@ " ) +(define_expand "cbranchcc4" + [(set (pc) (if_then_else + (match_operator 0 "aarch64_comparison_operator" + [(match_operand 1 "cc_register" "") + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" + " ") + +(define_insn "*ccmp_and" + [(set (match_operand 6 "ccmp_cc_register" "") + (compare + (and:SI + (match_operator 4 "aarch64_comparison_operator" + [(match_operand 0 "ccmp_cc_register" "") + (match_operand 1 "aarch64_plus_operand" "")]) + (match_operator 5 "aarch64_comparison_operator" + [(match_operand:GPI 2 "register_operand" "r,r,r") + (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn")])) + (const_int 0)))] + "" + { + return aarch64_output_ccmp (operands, true, which_alternative); + } + [(set_attr "type" "alus_reg,alus_imm,alus_imm")] +) + +(define_insn "*ccmp_ior" + [(set (match_operand 6 "ccmp_cc_register" "") + (compare + (ior:SI + (match_operator 4 "aarch64_comparison_operator" + [(match_operand 0 "ccmp_cc_register" "") + (match_operand 1 "aarch64_plus_operand" "")]) + (match_operator 5 "aarch64_comparison_operator" + [(match_operand:GPI 2 "register_operand" "r,r,r") + (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn")])) + (const_int 0)))] + "" + { + return aarch64_output_ccmp (operands, false, which_alternative); + } + [(set_attr "type" "alus_reg,alus_imm,alus_imm")] +) + (define_insn "*condjump" [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" [(match_operand 1 "cc_register" "") (const_int 0)]) 57,1