From patchwork Wed May 21 09:58:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 30521 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yk0-f197.google.com (mail-yk0-f197.google.com [209.85.160.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 37D1C20675 for ; Wed, 21 May 2014 09:58:43 +0000 (UTC) Received: by mail-yk0-f197.google.com with SMTP id 19sf3750507ykq.8 for ; Wed, 21 May 2014 02:58:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:mailing-list:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:sender :delivered-to:mime-version:date:message-id:subject:from:to:cc :x-original-sender:x-original-authentication-results:content-type; bh=Dh5IDSlTUqVcUrMBLAZROBlSgSydMcE2E4cI5VwL6+0=; b=AUn0rGPR6Bg8aMva7swskWSgevI+SaPIWMAj9AiHlccrtJIs6ZTjEIGhRo2d8FZD/T PNJ9vw68fNBG53WFhmFxp3SCfOynUvYOrhSBgMdOnZgG2CF9pE9xL5MXU+ols9XkntVO Eq437Si46rAA/eIMCO9xgIjhVQafWdw5if/9FS+cGdoudWkqmMD85b4DKBPkYIwM0vPy IQtOe1romNnVxcZBHgzH38ANMMU9t+mGp1HFpYpPe8jpF4cLfALW5cq4stUp7du26Ag1 gLeUmg1RtUyLE71LGKkdKA22Z3Ruhax/iYemiUf96KwgQV2x45FSPCx1/i1uOEJowXyc mCNw== X-Gm-Message-State: ALoCoQl58oIJwF+8TTiJ9dWcX5icGoI2VloO1TddIX1bqzveSkSFrmPhSu7c/sT4W+7AlLiE9sTo X-Received: by 10.236.144.136 with SMTP id n8mr19583912yhj.22.1400666323026; Wed, 21 May 2014 02:58:43 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.50.143 with SMTP id s15ls682638qga.33.gmail; Wed, 21 May 2014 02:58:42 -0700 (PDT) X-Received: by 10.52.252.43 with SMTP id zp11mr5676648vdc.44.1400666322911; Wed, 21 May 2014 02:58:42 -0700 (PDT) Received: from mail-vc0-x22d.google.com (mail-vc0-x22d.google.com [2607:f8b0:400c:c03::22d]) by mx.google.com with ESMTPS id im2si138624veb.47.2014.05.21.02.58.42 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 21 May 2014 02:58:42 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2607:f8b0:400c:c03::22d as permitted sender) client-ip=2607:f8b0:400c:c03::22d; Received: by mail-vc0-f173.google.com with SMTP id il7so2200621vcb.18 for ; Wed, 21 May 2014 02:58:42 -0700 (PDT) X-Received: by 10.58.48.201 with SMTP id o9mr41719024ven.5.1400666322767; Wed, 21 May 2014 02:58:42 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp99236vcb; Wed, 21 May 2014 02:58:42 -0700 (PDT) X-Received: by 10.66.226.172 with SMTP id rt12mr57712122pac.101.1400666322050; Wed, 21 May 2014 02:58:42 -0700 (PDT) Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id in10si28433088pac.127.2014.05.21.02.58.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 May 2014 02:58:42 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-368120-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 9207 invoked by alias); 21 May 2014 09:58:30 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 9196 invoked by uid 89); 21 May 2014 09:58:29 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-lb0-f171.google.com Received: from mail-lb0-f171.google.com (HELO mail-lb0-f171.google.com) (209.85.217.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 21 May 2014 09:58:28 +0000 Received: by mail-lb0-f171.google.com with SMTP id 10so1368968lbg.2 for ; Wed, 21 May 2014 02:58:24 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.112.203.197 with SMTP id ks5mr604305lbc.89.1400666304314; Wed, 21 May 2014 02:58:24 -0700 (PDT) Received: by 10.112.13.36 with HTTP; Wed, 21 May 2014 02:58:24 -0700 (PDT) Date: Wed, 21 May 2014 17:58:24 +0800 Message-ID: Subject: [PATCH] Fix PR 61225 From: Zhenqiang Chen To: "gcc-patches@gcc.gnu.org" Cc: Jakub Jelinek X-IsSubscribed: yes X-Original-Sender: zhenqiang.chen@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2607:f8b0:400c:c03::22d as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gcc.gnu.org X-Google-Group-Id: 836684582541 Hi, The patch fixes the gcc.target/i386/pr49095.c FAIL in PR61225. The test case tends to check a peephole2 optimization, which optimizes the following sequence 2: bx:SI=ax:SI 25: ax:SI=[bx:SI] 7: {ax:SI=ax:SI-0x1;clobber flags:CC;} 8: [bx:SI]=ax:SI 9: flags:CCZ=cmp(ax:SI,0) to 2: bx:SI=ax:SI 41: {flags:CCZ=cmp([bx:SI]-0x1,0);[bx:SI]=[bx:SI]-0x1;} The enhanced shrink-wrapping, which calls copyprop_hardreg_forward changes the INSN 25 to 25: ax:SI=[ax:SI] Then peephole2 can not optimize it since two memory_operands look like different. To fix it, the patch adds another peephole2 rule to read one more insn. From the register copy, it knows the address is the same. Bootstrap and no make check regression on X86-64. OK for trunk? Thanks! -Zhenqiang ChangeLog: 2014-05-21 Zhenqiang Chen Part of PR rtl-optimization/61225 * config/i386/i386.md: New peephole2 rule. * rtl.c (rtx_equal_p_if_reg_equal): New function. * rtl.h (rtx_equal_p_if_reg_equal): New prototype. testsuite/ChangeLog: 2014-05-21 Zhenqiang Chen * gcc.dg/pr61225.c: New test. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 44e80ec..40639a5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -17021,6 +17021,49 @@ operands[5], const0_rtx); }) +;; Attempt to use arith or logical operations with memory outputs with +;; setting of flags. The difference from previous pattern is that it includes +;; one more register copy insn, which is copy-forwarded to the address. +(define_peephole2 + [(set (match_operand:SWI 6 "register_operand") + (match_operand:SWI 0 "register_operand")) + (set (match_dup 0) + (match_operand:SWI 1 "memory_operand")) + (parallel [(set (match_dup 0) + (match_operator:SWI 3 "plusminuslogic_operator" + [(match_dup 0) + (match_operand:SWI 2 "")])) + (clobber (reg:CC FLAGS_REG))]) + (set (match_operand:SWI 7 "memory_operand") (match_dup 0)) + (set (reg FLAGS_REG) (compare (match_dup 0) (const_int 0)))] + "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ()) + && peep2_reg_dead_p (5, operands[0]) + && !reg_overlap_mentioned_p (operands[0], operands[2]) + && !reg_overlap_mentioned_p (operands[0], operands[6]) + && (GET_MODE (operands[0]) == GET_MODE (operands[6])) + && (MEM_ADDR_SPACE (operands[1]) == MEM_ADDR_SPACE (operands[7])) + && rtx_equal_p_if_reg_equal (operands[0], operands[6], + XEXP (operands[1], 0), XEXP (operands[7], 0)) + && (mode != QImode + || immediate_operand (operands[2], QImode) + || q_regs_operand (operands[2], QImode)) + && ix86_match_ccmode (peep2_next_insn (4), + (GET_CODE (operands[3]) == PLUS + || GET_CODE (operands[3]) == MINUS) + ? CCGOCmode : CCNOmode)" + [(set (match_dup 6) (match_dup 0)) + (parallel [(set (match_dup 4) (match_dup 5)) + (set (match_dup 1) (match_op_dup 3 [(match_dup 1) + (match_dup 2)]))])] +{ + operands[4] = SET_DEST (PATTERN (peep2_next_insn (4))); + operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), mode, + copy_rtx (operands[1]), + copy_rtx (operands[2])); + operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]), + operands[5], const0_rtx); +}) + (define_peephole2 [(parallel [(set (match_operand:SWI 0 "register_operand") (match_operator:SWI 2 "plusminuslogic_operator" diff --git a/gcc/rtl.c b/gcc/rtl.c index 520f9a8..99418fc 100644 --- a/gcc/rtl.c +++ b/gcc/rtl.c @@ -654,6 +654,82 @@ rtx_equal_p (const_rtx x, const_rtx y) return 1; } +/* Return 1 if X and Y are equal rtx's if RX used in X and RY used + Y are equal. */ + +int +rtx_equal_p_if_reg_equal (const_rtx rx, const_rtx ry, + const_rtx x, const_rtx y) +{ + int i; + enum rtx_code code; + const char *fmt; + + gcc_assert (REG_P (rx) && REG_P (ry) && x && y); + + code = GET_CODE (x); + /* Rtx's of different codes cannot be equal. */ + if (code != GET_CODE (y)) + return 0; + + if (rtx_equal_p (x, y) == 1) + return 1; + + /* Since rx == ry, if x == rx && y == ry, x == y. */ + if (REG_P (x) && REG_P (y) + && GET_MODE (x) == GET_MODE (rx) + && REGNO (x) == REGNO (rx) + && GET_MODE (y) == GET_MODE (ry) + && REGNO (y) == REGNO (ry)) + return 1; + + /* Compare the elements. If any pair of corresponding elements + fail to match, return 0 for the whole thing. */ + + fmt = GET_RTX_FORMAT (code); + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) + { + switch (fmt[i]) + { + case 'e': + if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0) + { + rtx xi = XEXP (x, i); + rtx yi = XEXP (y, i); + + if (!(REG_P (xi) && REG_P (yi) + && GET_MODE (xi) == GET_MODE (rx) + && REGNO (xi) == REGNO (rx) + && GET_MODE (yi) == GET_MODE (ry) + && REGNO (yi) == REGNO (ry))) + return 0; + } + break; + case 'w': + if (XWINT (x, i) != XWINT (y, i)) + return 0; + break; + + case 'n': + case 'i': + if (XINT (x, i) != XINT (y, i)) + return 0; + break; + + case 'u': + case '0': + case 't': + break; + + default: + if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0) + return 0; + break; + } + } + return 1; +} + /* Iteratively hash rtx X. */ hashval_t diff --git a/gcc/rtl.h b/gcc/rtl.h index 10ae1e9..7f9e9e7 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -1983,6 +1983,8 @@ extern unsigned int rtx_size (const_rtx); extern rtx shallow_copy_rtx_stat (const_rtx MEM_STAT_DECL); #define shallow_copy_rtx(a) shallow_copy_rtx_stat (a MEM_STAT_INFO) extern int rtx_equal_p (const_rtx, const_rtx); +extern int rtx_equal_p_if_reg_equal (const_rtx, const_rtx, + const_rtx, const_rtx); extern hashval_t iterative_hash_rtx (const_rtx, hashval_t); /* In emit-rtl.c */ diff --git a/gcc/testsuite/gcc.target/i386/pr61225.c b/gcc/testsuite/gcc.target/i386/pr61225.c new file mode 100644 index 0000000..1b33e9c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61225.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ +/* { dg-options "-Os -mregparm=2" { target ia32 } } */ + +void foo (void *); + +int * +f1 (int *x) +{ + if (!--*(x)) + foo (x); + return x; +} + +int * +f2 (int *x) +{ + if (!--*(x + 4)) + foo (x); + return x; +} + +/* { dg-final { scan-assembler-not "test\[lq\]" } } */