From patchwork Mon Nov 28 16:52:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Preudhomme X-Patchwork-Id: 84428 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp1221503qgi; Mon, 28 Nov 2016 08:52:58 -0800 (PST) X-Received: by 10.99.56.19 with SMTP id f19mr42111653pga.72.1480351978738; Mon, 28 Nov 2016 08:52:58 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id f12si55899449pfe.93.2016.11.28.08.52.58 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Nov 2016 08:52:58 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-442792-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-442792-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-442792-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=OUkKTs9DAOASKkc8+ EUGcWDSnPj8O/NMWdNqnOzwZddrYKAr+lm16jAVhpte8MDTPFYnVW728Ae6XiKUw L46PfQAw7F5uXIy/rW/04zDs8hIszPFu6qW+eNnaQ67Ve+li3W9D+Qb2+97DJLvR j0IZXB3ktz4f0l6xNRe0YVWf8w= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=8VpnjDH5Rg9AeSxzYfDPm/c QUWU=; b=PqHdKuzI04+4DRVbGzwMdocgOYDXqmeuMmVk0nIcaQFh1HvQqVHc7BP 3LOAeo3+P4gUm7Fg3adySbg2nP0uzpjfhVf94XdmuPJuXU7prCAlwRTr6VJL7+m5 qtQhPlo3ndQAnfm3MsDBDAGyUgYDpjoyhpOLp8FdjSufWP5gY5lM= Received: (qmail 79492 invoked by alias); 28 Nov 2016 16:52:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 79481 invoked by uid 89); 28 Nov 2016 16:52:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.8 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=HX-Envelope-From:sk:thomas., Thumb, Earnshaw, Usage X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 28 Nov 2016 16:52:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3ED47AD7; Mon, 28 Nov 2016 08:52:30 -0800 (PST) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7E8263F445; Mon, 28 Nov 2016 08:52:29 -0800 (PST) Subject: Re: [PATCH, ARM/testsuite 6/7, ping4] Force soft float in ARMv6-M and ARMv8-M Baseline options To: "Richard Earnshaw (lists)" , "gcc-patches@gcc.gnu.org" , Kyrill Tkachov , Ramana Radhakrishnan References: <10c4444d-3f88-7cab-4ef9-80de644bab1f@foss.arm.com> <3a4ea2fc-fe53-cb50-16a7-888839175a55@arm.com> <21f27a25-0e7f-a68f-47c4-bf15b247cc80@foss.arm.com> <0f1821cf-f20c-ccc5-6811-89b97303e332@foss.arm.com> From: Thomas Preudhomme Message-ID: <961392e8-08ad-571a-6029-642185fc556d@foss.arm.com> Date: Mon, 28 Nov 2016 16:52:28 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: X-IsSubscribed: yes Hi Richard, Ping? Best regards, Thomas On 17/11/16 20:42, Thomas Preudhomme wrote: > Ping? > > Best regards, > > Thomas > > On 08/11/16 13:35, Thomas Preudhomme wrote: >> Ping, >> >> Best regards, >> >> Thomas >> >> On 02/11/16 10:04, Thomas Preudhomme wrote: >>> Ping? >>> >>> Best regards, >>> >>> Thomas >>> >>> On 28/10/16 10:49, Thomas Preudhomme wrote: >>>> On 22/09/16 16:47, Richard Earnshaw (lists) wrote: >>>>> On 22/09/16 15:51, Thomas Preudhomme wrote: >>>>>> Sorry, noticed an error in the patch. It was not caught during testing >>>>>> because GCC was built with --with-mode=thumb. Correct patch attached. >>>>>> >>>>>> Best regards, >>>>>> >>>>>> Thomas >>>>>> >>>>>> On 22/09/16 14:49, Thomas Preudhomme wrote: >>>>>>> Hi, >>>>>>> >>>>>>> ARMv6-M and ARMv8-M Baseline only support soft float ABI. Therefore, the >>>>>>> arm_arch_v8m_base add option should pass -mfloat-abi=soft, much like >>>>>>> -mthumb is >>>>>>> passed for architectures that only support Thumb instruction set. This >>>>>>> patch >>>>>>> adds -mfloat-abi=soft to both arm_arch_v6m and arm_arch_v8m_base add >>>>>>> options. >>>>>>> Patch is in attachment. >>>>>>> >>>>>>> ChangeLog entry is as follows: >>>>>>> >>>>>>> *** gcc/testsuite/ChangeLog *** >>>>>>> >>>>>>> 2016-07-15 Thomas Preud'homme >>>>>>> >>>>>>> * lib/target-supports.exp (add_options_for_arm_arch_v6m): Add >>>>>>> -mfloat-abi=soft option. >>>>>>> (add_options_for_arm_arch_v8m_base): Likewise. >>>>>>> >>>>>>> >>>>>>> Is this ok for trunk? >>>>>>> >>>>>>> Best regards, >>>>>>> >>>>>>> Thomas >>>>>> >>>>>> 6_softfloat_testing_v6m_v8m_baseline.patch >>>>>> >>>>>> >>>>>> diff --git a/gcc/testsuite/lib/target-supports.exp >>>>>> b/gcc/testsuite/lib/target-supports.exp >>>>>> index >>>>>> 0dabea0850124947a7fe333e0b94c4077434f278..b5d72f1283be6a6e4736a1d20936e169c1384398 >>>>>> >>>>>> >>>>>> >>>>>> 100644 >>>>>> --- a/gcc/testsuite/lib/target-supports.exp >>>>>> +++ b/gcc/testsuite/lib/target-supports.exp >>>>>> @@ -3540,24 +3540,25 @@ proc check_effective_target_arm_fp16_hw { } { >>>>>> # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */ >>>>>> # /* { dg-add-options arm_arch_v5 } */ >>>>>> # /* { dg-require-effective-target arm_arch_v5_multilib } */ >>>>>> -foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__ >>>>>> - v4t "-march=armv4t" __ARM_ARCH_4T__ >>>>>> - v5 "-march=armv5 -marm" __ARM_ARCH_5__ >>>>>> - v5t "-march=armv5t" __ARM_ARCH_5T__ >>>>>> - v5te "-march=armv5te" __ARM_ARCH_5TE__ >>>>>> - v6 "-march=armv6" __ARM_ARCH_6__ >>>>>> - v6k "-march=armv6k" __ARM_ARCH_6K__ >>>>>> - v6t2 "-march=armv6t2" __ARM_ARCH_6T2__ >>>>>> - v6z "-march=armv6z" __ARM_ARCH_6Z__ >>>>>> - v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__ >>>>>> - v7a "-march=armv7-a" __ARM_ARCH_7A__ >>>>>> - v7r "-march=armv7-r" __ARM_ARCH_7R__ >>>>>> - v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ >>>>>> - v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ >>>>>> - v8a "-march=armv8-a" __ARM_ARCH_8A__ >>>>>> - v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ >>>>>> - v8m_base "-march=armv8-m.base -mthumb" >>>>>> __ARM_ARCH_8M_BASE__ >>>>>> - v8m_main "-march=armv8-m.main -mthumb" >>>>>> __ARM_ARCH_8M_MAIN__ } { >>>>>> +foreach { armfunc armflag armdef } { >>>>>> + v4 "-march=armv4 -marm" __ARM_ARCH_4__ >>>>>> + v4t "-march=armv4t" __ARM_ARCH_4T__ >>>>>> + v5 "-march=armv5 -marm" __ARM_ARCH_5__ >>>>>> + v5t "-march=armv5t" __ARM_ARCH_5T__ >>>>>> + v5te "-march=armv5te" __ARM_ARCH_5TE__ >>>>>> + v6 "-march=armv6" __ARM_ARCH_6__ >>>>>> + v6k "-march=armv6k" __ARM_ARCH_6K__ >>>>>> + v6t2 "-march=armv6t2" __ARM_ARCH_6T2__ >>>>>> + v6z "-march=armv6z" __ARM_ARCH_6Z__ >>>>>> + v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__ >>>>>> + v7a "-march=armv7-a" __ARM_ARCH_7A__ >>>>>> + v7r "-march=armv7-r" __ARM_ARCH_7R__ >>>>>> + v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ >>>>>> + v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ >>>>>> + v8a "-march=armv8-a" __ARM_ARCH_8A__ >>>>>> + v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ >>>>>> + v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" >>>>>> __ARM_ARCH_8M_BASE__ >>>>>> + v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } { >>>>>> eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] { >>>>>> proc check_effective_target_arm_arch_FUNC_ok { } { >>>>>> if { [ string match "*-marm*" "FLAG" ] && >>>>>> >>>>> >>>>> I think if you're going to do this you need to also check that changing >>>>> the ABI in this way isn't incompatible with other aspects of how the >>>>> user has invoked dejagnu. >>>> >>>> The reason this patch was made is that without it dg-require-effective-target >>>> arm_arch_v8m_base_ok evaluates to true for an arm-none-linux-gnueabihf >>>> toolchain >>>> but then any testcase containing a function for such a target (such as the >>>> atomic-op-* in gcc.target/arm) will error out because ARMv8-M Baseline does not >>>> support hard float ABI. >>>> >>>> I see 2 ways to fix this: >>>> >>>> 1) the approach taken in this patch, ie saying that to select ARMv8-M baseline >>>> architecture you need the right -march, -mthumb but also the right float ABI. >>>> >>>> Note that the comment at the top of that procedure says: >>>> # Creates a series of routines that return 1 if the given architecture >>>> # can be selected and a routine to give the flags to select that architecture >>>> >>>> 2) Add a function to the assembly that is used to test support for the >>>> architecture. >>>> >>>> The reason I favor the first one is that it enables more test while the second >>>> test would just skip ARMv6-M and ARMv8-M Baseline tests for >>>> arm-none-linux-gnueabihf toolchains. >>>> >>>> Is this patch ok for trunk? >>>> >>>> Best regards, >>>> >>>> Thomas diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index b5a9faab5a47d01371c6402a5b07d34071dbc34b..ce2fc0af116a4ffbec272642dff21ed5797a3028 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3679,25 +3679,26 @@ proc check_effective_target_arm_fp16_hw { } { # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */ # /* { dg-add-options arm_arch_v5 } */ # /* { dg-require-effective-target arm_arch_v5_multilib } */ -foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__ - v4t "-march=armv4t" __ARM_ARCH_4T__ - v5 "-march=armv5 -marm" __ARM_ARCH_5__ - v5t "-march=armv5t" __ARM_ARCH_5T__ - v5te "-march=armv5te" __ARM_ARCH_5TE__ - v6 "-march=armv6" __ARM_ARCH_6__ - v6k "-march=armv6k" __ARM_ARCH_6K__ - v6t2 "-march=armv6t2" __ARM_ARCH_6T2__ - v6z "-march=armv6z" __ARM_ARCH_6Z__ - v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__ - v7a "-march=armv7-a" __ARM_ARCH_7A__ - v7r "-march=armv7-r" __ARM_ARCH_7R__ - v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ - v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ - v8a "-march=armv8-a" __ARM_ARCH_8A__ - v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ - v8_2a "-march=armv8.2a" __ARM_ARCH_8A__ - v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__ - v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } { +foreach { armfunc armflag armdef } { + v4 "-march=armv4 -marm" __ARM_ARCH_4__ + v4t "-march=armv4t" __ARM_ARCH_4T__ + v5 "-march=armv5 -marm" __ARM_ARCH_5__ + v5t "-march=armv5t" __ARM_ARCH_5T__ + v5te "-march=armv5te" __ARM_ARCH_5TE__ + v6 "-march=armv6" __ARM_ARCH_6__ + v6k "-march=armv6k" __ARM_ARCH_6K__ + v6t2 "-march=armv6t2" __ARM_ARCH_6T2__ + v6z "-march=armv6z" __ARM_ARCH_6Z__ + v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__ + v7a "-march=armv7-a" __ARM_ARCH_7A__ + v7r "-march=armv7-r" __ARM_ARCH_7R__ + v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ + v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ + v8a "-march=armv8-a" __ARM_ARCH_8A__ + v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ + v8_2a "-march=armv8.2a" __ARM_ARCH_8A__ + v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" __ARM_ARCH_8M_BASE__ + v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } { eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] { proc check_effective_target_arm_arch_FUNC_ok { } { if { [ string match "*-marm*" "FLAG" ] &&