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[92.40.249.184]) by smtp.gmail.com with ESMTPSA id o197sm6454619wmd.9.2017.07.13.01.49.29 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Jul 2017 01:49:29 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [30/77] Use scalar_int_mode for doubleword splits References: <8760ewohsv.fsf@linaro.org> Date: Thu, 13 Jul 2017 09:49:28 +0100 In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100") Message-ID: <87k23ciuw7.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 This patch uses is_a in a couple of places that were splitting doubleword integer operations into word_mode operations. It also uses scalar_int_mode in the expand_expr_real_2 handling of doubleword shifts. 2017-07-13 Richard Sandiford Alan Hayward David Sherwood gcc/ * expr.c (expand_expr_real_2): Use scalar_int_mode for the double-word mode. * lower-subreg.c (resolve_shift_zext): Use is_a . * optabs.c (expand_unop): Likewise. Index: gcc/expr.c =================================================================== --- gcc/expr.c 2017-07-13 09:18:35.048126637 +0100 +++ gcc/expr.c 2017-07-13 09:18:36.841969327 +0100 @@ -8201,6 +8201,7 @@ expand_expr_real_2 (sepops ops, rtx targ tree type; int unsignedp; machine_mode mode; + scalar_int_mode int_mode; enum tree_code code = ops->code; optab this_optab; rtx subtarget, original_target; @@ -9165,8 +9166,8 @@ #define REDUCE_BIT_FIELD(expr) (reduce_b if (code == LSHIFT_EXPR && target && REG_P (target) - && mode == GET_MODE_WIDER_MODE (word_mode).else_void () - && GET_MODE_SIZE (mode) == 2 * GET_MODE_SIZE (word_mode) + && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode) + && mode == int_mode && TREE_CONSTANT (treeop1) && TREE_CODE (treeop0) == SSA_NAME) { @@ -9177,20 +9178,20 @@ #define REDUCE_BIT_FIELD(expr) (reduce_b machine_mode rmode = TYPE_MODE (TREE_TYPE (gimple_assign_rhs1 (def))); - if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (mode) + if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode) && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode) && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode)) >= GET_MODE_BITSIZE (word_mode))) { rtx_insn *seq, *seq_old; unsigned int high_off = subreg_highpart_offset (word_mode, - mode); + int_mode); bool extend_unsigned = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def))); - rtx low = lowpart_subreg (word_mode, op0, mode); - rtx dest_low = lowpart_subreg (word_mode, target, mode); + rtx low = lowpart_subreg (word_mode, op0, int_mode); + rtx dest_low = lowpart_subreg (word_mode, target, int_mode); rtx dest_high = simplify_gen_subreg (word_mode, target, - mode, high_off); + int_mode, high_off); HOST_WIDE_INT ramount = (BITS_PER_WORD - TREE_INT_CST_LOW (treeop1)); tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount); @@ -9213,12 +9214,13 @@ #define REDUCE_BIT_FIELD(expr) (reduce_b end_sequence (); temp = target ; - if (have_insn_for (ASHIFT, mode)) + if (have_insn_for (ASHIFT, int_mode)) { bool speed_p = optimize_insn_for_speed_p (); start_sequence (); - rtx ret_old = expand_variable_shift (code, mode, op0, - treeop1, target, + rtx ret_old = expand_variable_shift (code, int_mode, + op0, treeop1, + target, unsignedp); seq_old = get_insns (); Index: gcc/lower-subreg.c =================================================================== --- gcc/lower-subreg.c 2017-07-13 09:18:29.217658709 +0100 +++ gcc/lower-subreg.c 2017-07-13 09:18:36.841969327 +0100 @@ -1219,6 +1219,7 @@ resolve_shift_zext (rtx_insn *insn) rtx_insn *insns; rtx src_reg, dest_reg, dest_upper, upper_src = NULL_RTX; int src_reg_num, dest_reg_num, offset1, offset2, src_offset; + scalar_int_mode inner_mode; set = single_set (insn); if (!set) @@ -1232,6 +1233,8 @@ resolve_shift_zext (rtx_insn *insn) return NULL; op_operand = XEXP (op, 0); + if (!is_a (GET_MODE (op_operand), &inner_mode)) + return NULL; /* We can tear this operation apart only if the regs were already torn apart. */ @@ -1244,8 +1247,7 @@ resolve_shift_zext (rtx_insn *insn) src_reg_num = (GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) ? 1 : 0; - if (WORDS_BIG_ENDIAN - && GET_MODE_SIZE (GET_MODE (op_operand)) > UNITS_PER_WORD) + if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (inner_mode) > UNITS_PER_WORD) src_reg_num = 1 - src_reg_num; if (GET_CODE (op) == ZERO_EXTEND) Index: gcc/optabs.c =================================================================== --- gcc/optabs.c 2017-07-13 09:18:35.049126549 +0100 +++ gcc/optabs.c 2017-07-13 09:18:36.842969240 +0100 @@ -2736,22 +2736,24 @@ expand_unop (machine_mode mode, optab un } if (unoptab == popcount_optab - && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD + && is_a (mode, &int_mode) + && GET_MODE_SIZE (int_mode) == 2 * UNITS_PER_WORD && optab_handler (unoptab, word_mode) != CODE_FOR_nothing && optimize_insn_for_speed_p ()) { - temp = expand_doubleword_popcount (mode, op0, target); + temp = expand_doubleword_popcount (int_mode, op0, target); if (temp) return temp; } if (unoptab == parity_optab - && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD + && is_a (mode, &int_mode) + && GET_MODE_SIZE (int_mode) == 2 * UNITS_PER_WORD && (optab_handler (unoptab, word_mode) != CODE_FOR_nothing || optab_handler (popcount_optab, word_mode) != CODE_FOR_nothing) && optimize_insn_for_speed_p ()) { - temp = expand_doubleword_parity (mode, op0, target); + temp = expand_doubleword_parity (int_mode, op0, target); if (temp) return temp; }