[22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>

Message ID	87iniwk9l6.fsf@linaro.org
State	Accepted
Commit	45e8e706e295e7770d02c6d9c9798f4bab7ab524
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of gcc-patches-return-458013-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type; q=dns; s=default; b=MzTxVZmOA6ZfcAnAa7OkDXJpSAn8N iX5z4e4IjIyDLRKGJ902fHKstQukcGnUeKkDKi1JApzmJPgLSkBXy5rVlTH+c8Zw RT5NNP+lsxFi44ePh4RwPMS51UX75zlQXtNYRL+tmsuYGQaer92HDPp6Z5CmSXop RrKATO4Uieqcl0= Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk Sender: gcc-patches-owner@gcc.gnu.org From: Richard Sandiford <richard.sandiford@linaro.org> To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode> References: <8760ewohsv.fsf@linaro.org> Date: Thu, 13 Jul 2017 09:46:45 +0100 In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100") Message-ID: <87iniwk9l6.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain
Series	Add wrapper classes for machine_modes \| expand [00/77] Add wrapper classes for machine_modes [01/77] Add an E_ prefix to mode names [03/77] Allow machine modes to be classes [04/77] Add FOR_EACH iterators for modes [05/77] Small tweak to array_value_type [06/77] Make GET_MODE_WIDER return an opt_mode [07/77] Add scalar_float_mode [08/77] Simplify gen_trunc/extend_conv_libfunc [09/77] Add SCALAR_FLOAT_TYPE_MODE [10/77] Make assemble_real take a scalar_float_mode [11/77] Add a float_mode_for_size helper function [12/77] Use opt_scalar_float_mode when iterating over float modes [13/77] Make floatn_mode return an opt_scalar_float_mode [14/77] Make libgcc_floating_mode_supported_p take a scalar_float_mode [15/77] Add scalar_int_mode [16/77] Add scalar_int_mode_pod [17/77] Add an int_mode_for_size helper function [18/77] Make int_mode_for_mode return an opt_scalar_int_mode [19/77] Add a smallest_int_mode_for_size helper function [20/77] Replace MODE_INT checks with is_int_mode [21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode> [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode> [23/77] Replace != VOIDmode checks with is_a <scalar_int_mode> [24/77] Replace a != BLKmode check with is_a <scalar_int_mode> [25/77] Use is_a <scalar_int_mode> for bitmask optimisations [26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications [27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP [28/77] Use is_a <scalar_int_mode> for miscellaneous types of test [29/77] Make some _loc_descriptor helpers take scalar_int_mode [30/77] Use scalar_int_mode for doubleword splits [31/77] Use scalar_int_mode for move2add [32/77] Check is_a <scalar_int_mode> before calling valid_pointer_mode [33/77] Add a NARROWEST_INT_MODE macro [34/77] Add a SCALAR_INT_TYPE_MODE macro [35/77] Add uses of as_a <scalar_int_mode> [36/77] Use scalar_int_mode in the RTL iv routines [37/77] Use scalar_int_mode when emitting cstores [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p [39/77] Two changes to the get_best_mode interface [40/77] Use scalar_int_mode for extraction_insn fields [41/77] Split scalar integer handling out of force_to_mode [42/77] Use scalar_int_mode in simplify_shift_const_1 [43/77] Use scalar_int_mode in simplify_comparison [44/77] Make simplify_and_const_int take a scalar_int_mode [45/77] Make extract_left_shift take a scalar_int_mode [46/77] Make widest_int_mode_for_size return a scalar_int_mode [47/77] Make subroutines of nonzero_bits operate on scalar_int_mode [48/77] Make subroutines of num_sign_bit_copies operate on scalar_int_mode [49/77] Simplify nonzero/num_sign_bits hooks [50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs [51/77] Use opt_scalar_int_mode when iterating over integer modes [52/77] Use scalar_int_mode in extract/store_bit_field [53/77] Pass a mode to const_scalar_mask_from_tree [54/77] Add explicit int checks for alternative optab implementations [55/77] Use scalar_int_mode in simplify_const_unary_operation [56/77] Use the more specific type when two modes are known to be equal [57/77] Use scalar_int_mode in expand_expr_addr_expr [58/77] Use scalar_int_mode in a try_combine optimisation [59/77] Add a rtx_jump_table_data::get_data_mode helper [60/77] Pass scalar_int_modes to do_jump_by_parts_ [61/77] Use scalar_int_mode in the AArch64 port [63/77] Simplifications after type switch [64/77] Add a scalar_mode class [65/77] Add a SCALAR_TYPE_MODE macro [66/77] Use scalar_mode for constant integers [67/77] Use scalar_mode in fixed-value.* [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs [69/77] Split scalar-only part out of convert_mode [70/77] Make expand_fix/float check for scalar modes [71/77] Use opt_scalar_mode for mode iterators [72/77] Pass scalar_mode to scalar_mode_supported_p [73/77] Pass scalar_mode to scalar_mode_supported_p [74/77] Various small scalar_mode changes [75/77] Use scalar_mode in the AArch64 port [76/77] Add a scalar_mode_pod class [77/77] Add a complex_mode class

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45e8e706e295e7770d02c6d9c9798f4bab7ab524

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Subject: [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>
References: <8760ewohsv.fsf@linaro.org>
Date: Thu, 13 Jul 2017 09:46:45 +0100
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Series

Add wrapper classes for machine_modes | expand

Commit Message

Richard Sandiford July 13, 2017, 8:46 a.m. UTC

This patch replaces some checks of !VECTOR_MODE_P with checks
of is_a <scalar_int_mode>, in cases where the scalar integer
modes were the only useful alternatives left.

2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* simplify-rtx.c (simplify_binary_operation_1): Use
	is_a <scalar_int_mode> instead of !VECTOR_MODE_P.

Comments

Jeff Law Aug. 14, 2017, 7:29 p.m. UTC | #1

On 07/13/2017 02:46 AM, Richard Sandiford wrote:
> This patch replaces some checks of !VECTOR_MODE_P with checks

> of is_a <scalar_int_mode>, in cases where the scalar integer

> modes were the only useful alternatives left.

> 

> 2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>

> 	    Alan Hayward  <alan.hayward@arm.com>

> 	    David Sherwood  <david.sherwood@arm.com>

> 

> gcc/

> 	* simplify-rtx.c (simplify_binary_operation_1): Use

> 	is_a <scalar_int_mode> instead of !VECTOR_MODE_P.

OK
jeff

Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c	2017-07-13 09:18:32.529352614 +0100
+++ gcc/simplify-rtx.c	2017-07-13 09:18:33.217290298 +0100
@@ -2129,7 +2129,7 @@  simplify_binary_operation_1 (enum rtx_co
   rtx tem, reversed, opleft, opright;
   HOST_WIDE_INT val;
   unsigned int width = GET_MODE_PRECISION (mode);
-  scalar_int_mode int_mode;
+  scalar_int_mode int_mode, inner_mode;
 
   /* Even if we can't compute a constant result,
      there are some cases worth simplifying.  */
@@ -3365,27 +3365,24 @@  simplify_binary_operation_1 (enum rtx_co
 	 (subreg:M1 ([a|l]shiftrt:M2 (reg:M2) (const_int <c1 + c2>))
 		    <low_part>).  */
       if ((code == ASHIFTRT || code == LSHIFTRT)
-	  && !VECTOR_MODE_P (mode)
+	  && is_a <scalar_int_mode> (mode, &int_mode)
 	  && SUBREG_P (op0)
 	  && CONST_INT_P (op1)
 	  && GET_CODE (SUBREG_REG (op0)) == LSHIFTRT
-	  && !VECTOR_MODE_P (GET_MODE (SUBREG_REG (op0)))
+	  && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (op0)),
+				     &inner_mode)
 	  && CONST_INT_P (XEXP (SUBREG_REG (op0), 1))
-	  && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
-	      > GET_MODE_BITSIZE (mode))
+	  && GET_MODE_BITSIZE (inner_mode) > GET_MODE_BITSIZE (int_mode)
 	  && (INTVAL (XEXP (SUBREG_REG (op0), 1))
-	      == (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
-		  - GET_MODE_BITSIZE (mode)))
+	      == GET_MODE_BITSIZE (inner_mode) - GET_MODE_BITSIZE (int_mode))
 	  && subreg_lowpart_p (op0))
 	{
 	  rtx tmp = GEN_INT (INTVAL (XEXP (SUBREG_REG (op0), 1))
 			     + INTVAL (op1));
-	  machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
-	  tmp = simplify_gen_binary (code,
-				     GET_MODE (SUBREG_REG (op0)),
+	  tmp = simplify_gen_binary (code, inner_mode,
 				     XEXP (SUBREG_REG (op0), 0),
 				     tmp);
-	  return lowpart_subreg (mode, tmp, inner_mode);
+	  return lowpart_subreg (int_mode, tmp, inner_mode);
 	}
 
       if (SHIFT_COUNT_TRUNCATED && CONST_INT_P (op1))

[22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>

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