diff mbox series

[73/77] Pass scalar_mode to scalar_mode_supported_p

Message ID 87eftkbtd5.fsf@linaro.org
State New
Headers show
Series Add wrapper classes for machine_modes | expand

Commit Message

Richard Sandiford July 13, 2017, 9:04 a.m. UTC 
This patch makes the preferred_simd_mode target hook take a scalar_mode
rather than a machine_mode.

2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* target.def (preferred_simd_mode): Take a scalar_mode
	instead of a machine_mode.
	* targhooks.h (default_preferred_simd_mode): Likewise.
	* targhooks.c (default_preferred_simd_mode): Likewise.
	* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise.
	* config/arc/arc.c (arc_preferred_simd_mode): Likewise.
	* config/arm/arm.c (arm_preferred_simd_mode): Likewise.
	* config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise.
	* config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise.
	* config/i386/i386.c (ix86_preferred_simd_mode): Likewise.
	* config/mips/mips.c (mips_preferred_simd_mode): Likewise.
	* config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode):
	Likewise.
	* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise.
	* config/s390/s390.c (s390_preferred_simd_mode): Likewise.
	* config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise.
	* doc/tm.texi: Regenerate.
	* optabs-query.c (can_vec_mask_load_store_p): Return false for
	non-scalar modes.

Comments

Jeff Law Aug. 25, 2017, 4:44 p.m. UTC | #1 
On 07/13/2017 03:04 AM, Richard Sandiford wrote:
> This patch makes the preferred_simd_mode target hook take a scalar_mode

> rather than a machine_mode.

> 

> 2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>

> 	    Alan Hayward  <alan.hayward@arm.com>

> 	    David Sherwood  <david.sherwood@arm.com>

> 

> gcc/

> 	* target.def (preferred_simd_mode): Take a scalar_mode

> 	instead of a machine_mode.

> 	* targhooks.h (default_preferred_simd_mode): Likewise.

> 	* targhooks.c (default_preferred_simd_mode): Likewise.

> 	* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise.

> 	* config/arc/arc.c (arc_preferred_simd_mode): Likewise.

> 	* config/arm/arm.c (arm_preferred_simd_mode): Likewise.

> 	* config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise.

> 	* config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise.

> 	* config/i386/i386.c (ix86_preferred_simd_mode): Likewise.

> 	* config/mips/mips.c (mips_preferred_simd_mode): Likewise.

> 	* config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode):

> 	Likewise.

> 	* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise.

> 	* config/s390/s390.c (s390_preferred_simd_mode): Likewise.

> 	* config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise.

> 	* doc/tm.texi: Regenerate.

> 	* optabs-query.c (can_vec_mask_load_store_p): Return false for

> 	non-scalar modes.

OK.
jeff
diff mbox series

Patch

Index: gcc/target.def
===================================================================
--- gcc/target.def	2017-07-13 09:18:57.574337591 +0100
+++ gcc/target.def	2017-07-13 09:18:58.501271737 +0100
@@ -1848,7 +1848,7 @@  mode @var{mode}.  The default is\n\
 equal to @code{word_mode}, because the vectorizer can do some\n\
 transformations even in absence of specialized @acronym{SIMD} hardware.",
  machine_mode,
- (machine_mode mode),
+ (scalar_mode mode),
  default_preferred_simd_mode)
 
 /* Returns a mask of vector sizes to iterate over when auto-vectorizing
Index: gcc/targhooks.h
===================================================================
--- gcc/targhooks.h	2017-07-13 09:18:57.575337520 +0100
+++ gcc/targhooks.h	2017-07-13 09:18:58.502271667 +0100
@@ -100,7 +100,7 @@  extern bool default_builtin_vector_align
 default_builtin_support_vector_misalignment (machine_mode mode,
 					     const_tree,
 					     int, bool);
-extern machine_mode default_preferred_simd_mode (machine_mode mode);
+extern machine_mode default_preferred_simd_mode (scalar_mode mode);
 extern unsigned int default_autovectorize_vector_sizes (void);
 extern machine_mode default_get_mask_mode (unsigned, unsigned);
 extern void *default_init_cost (struct loop *);
Index: gcc/targhooks.c
===================================================================
--- gcc/targhooks.c	2017-07-13 09:18:57.574337591 +0100
+++ gcc/targhooks.c	2017-07-13 09:18:58.502271667 +0100
@@ -1156,7 +1156,7 @@  default_builtin_support_vector_misalignm
    possibly adds/subtracts using bit-twiddling.  */
 
 machine_mode
-default_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED)
+default_preferred_simd_mode (scalar_mode)
 {
   return word_mode;
 }
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c	2017-07-13 09:18:57.498343016 +0100
+++ gcc/config/aarch64/aarch64.c	2017-07-13 09:18:58.445275699 +0100
@@ -11163,7 +11163,7 @@  aarch64_simd_container_mode (machine_mod
 
 /* Return 128-bit container as the preferred SIMD mode for MODE.  */
 static machine_mode
-aarch64_preferred_simd_mode (machine_mode mode)
+aarch64_preferred_simd_mode (scalar_mode mode)
 {
   return aarch64_simd_container_mode (mode, 128);
 }
Index: gcc/config/arc/arc.c
===================================================================
--- gcc/config/arc/arc.c	2017-07-13 09:18:30.890502711 +0100
+++ gcc/config/arc/arc.c	2017-07-13 09:18:58.446275629 +0100
@@ -328,7 +328,7 @@  arc_vector_mode_supported_p (machine_mod
 /* Implements target hook TARGET_VECTORIZE_PREFERRED_SIMD_MODE.  */
 
 static machine_mode
-arc_preferred_simd_mode (machine_mode mode)
+arc_preferred_simd_mode (scalar_mode mode)
 {
   switch (mode)
     {
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	2017-07-13 09:18:57.510342160 +0100
+++ gcc/config/arm/arm.c	2017-07-13 09:18:58.449275416 +0100
@@ -268,7 +268,7 @@  static bool xscale_sched_adjust_cost (rt
 static bool fa726te_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
 static bool arm_array_mode_supported_p (machine_mode,
 					unsigned HOST_WIDE_INT);
-static machine_mode arm_preferred_simd_mode (machine_mode);
+static machine_mode arm_preferred_simd_mode (scalar_mode);
 static bool arm_class_likely_spilled_p (reg_class_t);
 static HOST_WIDE_INT arm_vector_alignment (const_tree type);
 static bool arm_vector_alignment_reachable (const_tree type, bool is_packed);
@@ -26947,7 +26947,7 @@  arm_array_mode_supported_p (machine_mode
    widths are supported properly by the middle-end.  */
 
 static machine_mode
-arm_preferred_simd_mode (machine_mode mode)
+arm_preferred_simd_mode (scalar_mode mode)
 {
   if (TARGET_NEON)
     switch (mode)
Index: gcc/config/c6x/c6x.c
===================================================================
--- gcc/config/c6x/c6x.c	2017-07-13 09:18:57.512342017 +0100
+++ gcc/config/c6x/c6x.c	2017-07-13 09:18:58.450275346 +0100
@@ -6238,7 +6238,7 @@  c6x_vector_mode_supported_p (machine_mod
 
 /* Implements TARGET_VECTORIZE_PREFERRED_SIMD_MODE.  */
 static machine_mode
-c6x_preferred_simd_mode (machine_mode mode)
+c6x_preferred_simd_mode (scalar_mode mode)
 {
   switch (mode)
     {
Index: gcc/config/epiphany/epiphany.c
===================================================================
--- gcc/config/epiphany/epiphany.c	2017-07-13 09:18:19.038703293 +0100
+++ gcc/config/epiphany/epiphany.c	2017-07-13 09:18:58.450275346 +0100
@@ -2773,7 +2773,7 @@  epiphany_min_divisions_for_recip_mul (ma
 }
 
 static machine_mode
-epiphany_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED)
+epiphany_preferred_simd_mode (scalar_mode mode ATTRIBUTE_UNUSED)
 {
   return TARGET_VECT_DOUBLE ? DImode : SImode;
 }
Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c	2017-07-13 09:18:57.530340732 +0100
+++ gcc/config/i386/i386.c	2017-07-13 09:18:58.464274355 +0100
@@ -51255,7 +51255,7 @@  ix86_reassociation_width (unsigned int,
    place emms and femms instructions.  */
 
 static machine_mode
-ix86_preferred_simd_mode (machine_mode mode)
+ix86_preferred_simd_mode (scalar_mode mode)
 {
   if (!TARGET_SSE)
     return word_mode;
Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	2017-07-13 09:18:57.535340375 +0100
+++ gcc/config/mips/mips.c	2017-07-13 09:18:58.467274143 +0100
@@ -13324,7 +13324,7 @@  mips_scalar_mode_supported_p (scalar_mod
 /* Implement TARGET_VECTORIZE_PREFERRED_SIMD_MODE.  */
 
 static machine_mode
-mips_preferred_simd_mode (machine_mode mode)
+mips_preferred_simd_mode (scalar_mode mode)
 {
   if (TARGET_PAIRED_SINGLE_FLOAT
       && mode == SFmode)
Index: gcc/config/powerpcspe/powerpcspe.c
===================================================================
--- gcc/config/powerpcspe/powerpcspe.c	2017-07-13 09:18:57.550339304 +0100
+++ gcc/config/powerpcspe/powerpcspe.c	2017-07-13 09:18:58.478273365 +0100
@@ -5876,7 +5876,7 @@  rs6000_builtin_vectorization_cost (enum
 /* Implement targetm.vectorize.preferred_simd_mode.  */
 
 static machine_mode
-rs6000_preferred_simd_mode (machine_mode mode)
+rs6000_preferred_simd_mode (scalar_mode mode)
 {
   if (TARGET_VSX)
     switch (mode)
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	2017-07-13 09:18:57.559338662 +0100
+++ gcc/config/rs6000/rs6000.c	2017-07-13 09:18:58.488272657 +0100
@@ -5770,7 +5770,7 @@  rs6000_builtin_vectorization_cost (enum
 /* Implement targetm.vectorize.preferred_simd_mode.  */
 
 static machine_mode
-rs6000_preferred_simd_mode (machine_mode mode)
+rs6000_preferred_simd_mode (scalar_mode mode)
 {
   if (TARGET_VSX)
     switch (mode)
Index: gcc/config/s390/s390.c
===================================================================
--- gcc/config/s390/s390.c	2017-07-13 09:18:57.563338376 +0100
+++ gcc/config/s390/s390.c	2017-07-13 09:18:58.491272445 +0100
@@ -15491,7 +15491,7 @@  #define FPC_DXC_SHIFT		 HOST_WIDE_INT_UC
 /* Return the vector mode to be used for inner mode MODE when doing
    vectorization.  */
 static machine_mode
-s390_preferred_simd_mode (machine_mode mode)
+s390_preferred_simd_mode (scalar_mode mode)
 {
   if (TARGET_VX)
     switch (mode)
Index: gcc/config/sparc/sparc.c
===================================================================
--- gcc/config/sparc/sparc.c	2017-07-13 09:18:40.782633518 +0100
+++ gcc/config/sparc/sparc.c	2017-07-13 09:18:58.494272233 +0100
@@ -661,7 +661,7 @@  static void sparc_conditional_register_u
 static const char *sparc_mangle_type (const_tree);
 #endif
 static void sparc_trampoline_init (rtx, tree, rtx);
-static machine_mode sparc_preferred_simd_mode (machine_mode);
+static machine_mode sparc_preferred_simd_mode (scalar_mode);
 static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass);
 static bool sparc_lra_p (void);
 static bool sparc_print_operand_punct_valid_p (unsigned char);
@@ -7684,7 +7684,7 @@  sparc_vector_mode_supported_p (machine_m
 /* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook.  */
 
 static machine_mode
-sparc_preferred_simd_mode (machine_mode mode)
+sparc_preferred_simd_mode (scalar_mode mode)
 {
   if (TARGET_VIS)
     switch (mode)
Index: gcc/doc/tm.texi
===================================================================
--- gcc/doc/tm.texi	2017-07-13 09:18:57.571337806 +0100
+++ gcc/doc/tm.texi	2017-07-13 09:18:58.499271879 +0100
@@ -5796,7 +5796,7 @@  the elements in the vectors should be of
 parameter is true if the memory access is defined in a packed struct.
 @end deftypefn
 
-@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (machine_mode @var{mode})
+@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (scalar_mode @var{mode})
 This hook should return the preferred mode for vectorizing scalar
 mode @var{mode}.  The default is
 equal to @code{word_mode}, because the vectorizer can do some
Index: gcc/optabs-query.c
===================================================================
--- gcc/optabs-query.c	2017-07-13 09:18:42.161519072 +0100
+++ gcc/optabs-query.c	2017-07-13 09:18:58.499271879 +0100
@@ -524,7 +524,11 @@  can_vec_mask_load_store_p (machine_mode
 
   /* See if there is any chance the mask load or store might be
      vectorized.  If not, punt.  */
-  vmode = targetm.vectorize.preferred_simd_mode (mode);
+  scalar_mode smode;
+  if (!is_a <scalar_mode> (mode, &smode))
+    return false;
+
+  vmode = targetm.vectorize.preferred_simd_mode (smode);
   if (!VECTOR_MODE_P (vmode))
     return false;
 
@@ -541,9 +545,9 @@  can_vec_mask_load_store_p (machine_mode
     {
       unsigned int cur = 1 << floor_log2 (vector_sizes);
       vector_sizes &= ~cur;
-      if (cur <= GET_MODE_SIZE (mode))
+      if (cur <= GET_MODE_SIZE (smode))
 	continue;
-      vmode = mode_for_vector (mode, cur / GET_MODE_SIZE (mode));
+      vmode = mode_for_vector (smode, cur / GET_MODE_SIZE (smode));
       mask_mode = targetm.vectorize.get_mask_mode (GET_MODE_NUNITS (vmode),
 						   cur);
       if (VECTOR_MODE_P (vmode)